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wifi: rtw89: read version of analog hardware
The chip contains digital and analog parts, and each of them has its own version number. This is used by BT coexistence mechanism to make strategy decision for different analog version. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230330133324.19538-2-pkshih@realtek.com
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@ -3535,6 +3535,8 @@ void rtw89_core_scan_complete(struct rtw89_dev *rtwdev,
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static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev)
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static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev)
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{
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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const struct rtw89_chip_info *chip = rtwdev->chip;
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int ret;
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u8 val;
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u8 cv;
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u8 cv;
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cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK);
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cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK);
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@ -3546,6 +3548,14 @@ static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev)
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}
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}
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rtwdev->hal.cv = cv;
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rtwdev->hal.cv = cv;
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if (chip->chip_id == RTL8852B || chip->chip_id == RTL8851B) {
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ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_CV, &val);
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if (!ret)
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return;
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rtwdev->hal.acv = u8_get_bits(val, XTAL_SI_ACV_MASK);
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}
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}
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}
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static void rtw89_core_setup_phycap(struct rtw89_dev *rtwdev)
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static void rtw89_core_setup_phycap(struct rtw89_dev *rtwdev)
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@ -108,6 +108,7 @@ enum rtw89_core_chip_id {
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RTL8852A,
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RTL8852A,
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RTL8852B,
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RTL8852B,
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RTL8852C,
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RTL8852C,
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RTL8851B,
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};
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};
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enum rtw89_cv {
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enum rtw89_cv {
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@ -3412,6 +3413,7 @@ struct rtw89_sub_entity {
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struct rtw89_hal {
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struct rtw89_hal {
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u32 rx_fltr;
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u32 rx_fltr;
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u8 cv;
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u8 cv;
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u8 acv;
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u32 sw_amsdu_max_size;
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u32 sw_amsdu_max_size;
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u32 antenna_tx;
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u32 antenna_tx;
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u32 antenna_rx;
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u32 antenna_rx;
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@ -1117,6 +1117,7 @@ enum rtw89_mac_xtal_si_offset {
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XTAL_SI_XTAL_XMD_4 = 0x26,
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XTAL_SI_XTAL_XMD_4 = 0x26,
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#define XTAL_SI_LPS_CAP GENMASK(3, 0)
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#define XTAL_SI_LPS_CAP GENMASK(3, 0)
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XTAL_SI_CV = 0x41,
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XTAL_SI_CV = 0x41,
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#define XTAL_SI_ACV_MASK GENMASK(3, 0)
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XTAL_SI_LOW_ADDR = 0x62,
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XTAL_SI_LOW_ADDR = 0x62,
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#define XTAL_SI_LOW_ADDR_MASK GENMASK(7, 0)
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#define XTAL_SI_LOW_ADDR_MASK GENMASK(7, 0)
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XTAL_SI_CTRL = 0x63,
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XTAL_SI_CTRL = 0x63,
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