arm64: dts: rockchip: Add eDP1 dt node for rk3588

Add eDP1 dt node for RK3588 SoC

Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20250426071554.1305042-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Andy Yan 2025-04-26 15:15:40 +08:00 committed by Heiko Stuebner
parent 932bcd2131
commit a481bb0b1a

View File

@ -252,6 +252,34 @@ hdmi1_out: port@1 {
};
};
edp1: edp@fded0000 {
compatible = "rockchip,rk3588-edp";
reg = <0x0 0xfded0000 0x0 0x1000>;
clocks = <&cru CLK_EDP1_24M>, <&cru PCLK_EDP1>, <&cru CLK_EDP1_200M>;
clock-names = "dp", "pclk", "spdif";
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH 0>;
phys = <&hdptxphy1>;
phy-names = "dp";
power-domains = <&power RK3588_PD_VO1>;
resets = <&cru SRST_EDP1_24M>, <&cru SRST_P_EDP1>;
reset-names = "dp", "apb";
rockchip,grf = <&vo1_grf>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
edp1_in: port@0 {
reg = <0>;
};
edp1_out: port@1 {
reg = <1>;
};
};
};
hdmi_receiver: hdmi_receiver@fdee0000 {
compatible = "rockchip,rk3588-hdmirx-ctrler", "snps,dw-hdmi-rx";
reg = <0x0 0xfdee0000 0x0 0x6000>;