Proxmox-Port/linux-loongson
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson synced 2025-09-02 16:44:59 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

arm64: dts: imx8mp: configure GPU and NPU clocks to overdrive rate

Browse Source 
A lot of other clocks on the i.MX8MP, including the DRAM set up by the
bootloader are already running at overdrive clock rates. While this is a
deviation from the configuration of other i.MX8M* family SoCs, overdrive
is the default for most i.MX8MP boards and only some special purpose
boards will choose to run the SoC at nominal drive rates. Up the GPU and
NPU clock rates to their overdrive level to be consistent with other
clocks set up in the dtsi.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Lucas Stach 2025-02-04 19:27:37 +01:00 committed by Shawn Guo
parent 556d6be6f2
commit 9f7595b3e5
1 changed files with 8 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View File

@ -816,12 +816,12 @@ pgc_mlmix: power-domain@4 {
assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>, assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,
<&clk IMX8MP_CLK_ML_AXI>, <&clk IMX8MP_CLK_ML_AXI>,
<&clk IMX8MP_CLK_ML_AHB>; <&clk IMX8MP_CLK_ML_AHB>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
<&clk IMX8MP_SYS_PLL1_800M>, <&clk IMX8MP_SYS_PLL1_800M>,
<&clk IMX8MP_SYS_PLL1_800M>; <&clk IMX8MP_SYS_PLL1_800M>;
assigned-clock-rates = <800000000>, assigned-clock-rates = <1000000000>,
<800000000>, <800000000>,
<300000000>; <400000000>;
}; };
pgc_audio: power-domain@5 { pgc_audio: power-domain@5 {
@ -2232,9 +2232,9 @@ gpu3d: gpu@38000000 {
clock-names = "core", "shader", "bus", "reg"; clock-names = "core", "shader", "bus", "reg";
assigned-clocks = <&clk IMX8MP_CLK_GPU3D_CORE>, assigned-clocks = <&clk IMX8MP_CLK_GPU3D_CORE>,
<&clk IMX8MP_CLK_GPU3D_SHADER_CORE>; <&clk IMX8MP_CLK_GPU3D_SHADER_CORE>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
<&clk IMX8MP_SYS_PLL1_800M>; <&clk IMX8MP_SYS_PLL2_1000M>;
assigned-clock-rates = <800000000>, <800000000>; assigned-clock-rates = <1000000000>, <1000000000>;
power-domains = <&pgc_gpu3d>; power-domains = <&pgc_gpu3d>;
}; };
@ -2247,8 +2247,8 @@ gpu2d: gpu@38008000 {
<&clk IMX8MP_CLK_GPU_AHB>; <&clk IMX8MP_CLK_GPU_AHB>;
clock-names = "core", "bus", "reg"; clock-names = "core", "bus", "reg";
assigned-clocks = <&clk IMX8MP_CLK_GPU2D_CORE>; assigned-clocks = <&clk IMX8MP_CLK_GPU2D_CORE>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
assigned-clock-rates = <800000000>; assigned-clock-rates = <1000000000>;
power-domains = <&pgc_gpu2d>; power-domains = <&pgc_gpu2d>;
}; };