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dt-bindings: remoteproc: Add Tightly Coupled Memory (TCM) bindings
Introduce bindings for TCM memory address space on AMD-xilinx Zynq UltraScale+ platform. It will help in defining TCM in device-tree and make it's access platform agnostic and data-driven. Tightly-coupled memories(TCMs) are low-latency memory that provides predictable instruction execution and predictable data load/store timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB memory banks on the ATCM and BTCM ports, for a total of 128 KB of memory. The TCM resources(reg, reg-names and power-domain) are documented for each TCM in the R5 node. The reg and reg-names are made as required properties as we don't want to hardcode TCM addresses for future platforms and for zu+ legacy implementation will ensure that the old dts without reg/reg-names works and stable ABI is maintained. It also extends the examples for TCM split and lockstep modes. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Link: https://lore.kernel.org/r/20240412183708.4036007-3-tanmay.shah@amd.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
This commit is contained in:
Radhey Shyam Pandey
Mathieu Poirier
parent
b31bcda55f
commit
9e1b2a0757
@ -18,11 +18,26 @@ description: |
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properties:
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compatible:
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const: xlnx,zynqmp-r5fss
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enum:
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- xlnx,zynqmp-r5fss
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- xlnx,versal-r5fss
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- xlnx,versal-net-r52fss
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"#address-cells":
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const: 2
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"#size-cells":
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const: 2
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ranges:
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description: |
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Standard ranges definition providing address translations for
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local R5F TCM address spaces to bus addresses.
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xlnx,cluster-mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1, 2]
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default: 1
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description: |
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The RPU MPCore can operate in split mode (Dual-processor performance), Safety
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lock-step mode(Both RPU cores execute the same code in lock-step,
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@ -36,8 +51,16 @@ properties:
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1: lockstep mode (default)
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2: single cpu mode
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xlnx,tcm-mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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description: |
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Configure RPU TCM
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0: split mode
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1: lockstep mode
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patternProperties:
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"^r5f-[a-f0-9]+$":
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"^r(.*)@[0-9a-f]+$":
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type: object
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description: |
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The RPU is located in the Low Power Domain of the Processor Subsystem.
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@ -52,10 +75,22 @@ patternProperties:
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properties:
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compatible:
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const: xlnx,zynqmp-r5f
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enum:
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- xlnx,zynqmp-r5f
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- xlnx,versal-r5f
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- xlnx,versal-net-r52f
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reg:
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minItems: 1
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maxItems: 4
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reg-names:
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minItems: 1
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maxItems: 4
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power-domains:
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maxItems: 1
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minItems: 2
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maxItems: 5
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mboxes:
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minItems: 1
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@ -101,35 +136,235 @@ patternProperties:
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required:
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- compatible
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- reg
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- reg-names
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- power-domains
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unevaluatedProperties: false
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required:
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- compatible
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- "#address-cells"
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- "#size-cells"
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- ranges
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- xlnx,versal-net-r52fss
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then:
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properties:
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xlnx,tcm-mode: false
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patternProperties:
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"^r52f@[0-9a-f]+$":
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type: object
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properties:
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reg:
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minItems: 1
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items:
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- description: ATCM internal memory
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- description: BTCM internal memory
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- description: CTCM internal memory
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reg-names:
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minItems: 1
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items:
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- const: atcm0
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- const: btcm0
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- const: ctcm0
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power-domains:
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minItems: 2
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items:
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- description: RPU core power domain
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- description: ATCM power domain
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- description: BTCM power domain
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- description: CTCM power domain
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- if:
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properties:
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compatible:
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contains:
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enum:
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- xlnx,zynqmp-r5fss
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- xlnx,versal-r5fss
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then:
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if:
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properties:
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xlnx,cluster-mode:
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enum: [1, 2]
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then:
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properties:
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xlnx,tcm-mode:
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enum: [1]
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patternProperties:
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"^r5f@[0-9a-f]+$":
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type: object
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properties:
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reg:
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minItems: 1
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items:
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- description: ATCM internal memory
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- description: BTCM internal memory
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- description: extra ATCM memory in lockstep mode
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- description: extra BTCM memory in lockstep mode
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reg-names:
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minItems: 1
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items:
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- const: atcm0
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- const: btcm0
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- const: atcm1
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- const: btcm1
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power-domains:
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minItems: 2
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items:
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- description: RPU core power domain
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- description: ATCM power domain
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- description: BTCM power domain
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- description: second ATCM power domain
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- description: second BTCM power domain
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required:
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- xlnx,tcm-mode
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else:
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properties:
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xlnx,tcm-mode:
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enum: [0]
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patternProperties:
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"^r5f@[0-9a-f]+$":
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type: object
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properties:
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reg:
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minItems: 1
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items:
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- description: ATCM internal memory
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- description: BTCM internal memory
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reg-names:
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minItems: 1
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items:
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- const: atcm0
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- const: btcm0
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power-domains:
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minItems: 2
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items:
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- description: RPU core power domain
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- description: ATCM power domain
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- description: BTCM power domain
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required:
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- xlnx,tcm-mode
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additionalProperties: false
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examples:
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- |
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remoteproc {
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compatible = "xlnx,zynqmp-r5fss";
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xlnx,cluster-mode = <1>;
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#include <dt-bindings/power/xlnx-zynqmp-power.h>
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r5f-0 {
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compatible = "xlnx,zynqmp-r5f";
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power-domains = <&zynqmp_firmware 0x7>;
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memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
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mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
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mbox-names = "tx", "rx";
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// Split mode configuration
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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remoteproc@ffe00000 {
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compatible = "xlnx,zynqmp-r5fss";
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xlnx,cluster-mode = <0>;
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xlnx,tcm-mode = <0>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
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<0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
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<0x1 0x0 0x0 0xffe90000 0x0 0x10000>,
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<0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>;
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r5f@0 {
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compatible = "xlnx,zynqmp-r5f";
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reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>;
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reg-names = "atcm0", "btcm0";
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power-domains = <&zynqmp_firmware PD_RPU_0>,
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<&zynqmp_firmware PD_R5_0_ATCM>,
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<&zynqmp_firmware PD_R5_0_BTCM>;
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memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
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<&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
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mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
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mbox-names = "tx", "rx";
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};
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r5f@1 {
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compatible = "xlnx,zynqmp-r5f";
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reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
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reg-names = "atcm0", "btcm0";
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power-domains = <&zynqmp_firmware PD_RPU_1>,
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<&zynqmp_firmware PD_R5_1_ATCM>,
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<&zynqmp_firmware PD_R5_1_BTCM>;
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memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
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<&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
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mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
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mbox-names = "tx", "rx";
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};
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};
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};
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r5f-1 {
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compatible = "xlnx,zynqmp-r5f";
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power-domains = <&zynqmp_firmware 0x8>;
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memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
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mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
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mbox-names = "tx", "rx";
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- |
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//Lockstep configuration
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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remoteproc@ffe00000 {
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compatible = "xlnx,zynqmp-r5fss";
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xlnx,cluster-mode = <1>;
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xlnx,tcm-mode = <1>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
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<0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
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<0x0 0x10000 0x0 0xffe10000 0x0 0x10000>,
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<0x0 0x30000 0x0 0xffe30000 0x0 0x10000>;
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r5f@0 {
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compatible = "xlnx,zynqmp-r5f";
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reg = <0x0 0x0 0x0 0x10000>,
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<0x0 0x20000 0x0 0x10000>,
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<0x0 0x10000 0x0 0x10000>,
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<0x0 0x30000 0x0 0x10000>;
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reg-names = "atcm0", "btcm0", "atcm1", "btcm1";
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power-domains = <&zynqmp_firmware PD_RPU_0>,
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<&zynqmp_firmware PD_R5_0_ATCM>,
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<&zynqmp_firmware PD_R5_0_BTCM>,
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<&zynqmp_firmware PD_R5_1_ATCM>,
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<&zynqmp_firmware PD_R5_1_BTCM>;
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memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
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<&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
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mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
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mbox-names = "tx", "rx";
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};
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r5f@1 {
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compatible = "xlnx,zynqmp-r5f";
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reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
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reg-names = "atcm0", "btcm0";
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power-domains = <&zynqmp_firmware PD_RPU_1>,
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<&zynqmp_firmware PD_R5_1_ATCM>,
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<&zynqmp_firmware PD_R5_1_BTCM>;
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memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
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<&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
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mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
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mbox-names = "tx", "rx";
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};
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};
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};
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...
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