arm64: dts: juno: Add separate SCMI variants

While Juno's SCP firmware initially spoke the SCPI protocol, binary
releases since 2018, and the newer open-source codebase, only speak SCMI
and thus aren't particularly compatibile with the DTs we currently have
upstream. Add a parallel set of variant DTs for boards with up-to-date
firmware, replacing the SCPI parts with their new SCMI equivalents.

Link: https://lore.kernel.org/r/f3516815104f951a05fc0f799681f77d7968f6ac.1645125063.git.robin.murphy@arm.com
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
This commit is contained in:
Robin Murphy 2022-02-17 19:11:03 +00:00 committed by Sudeep Holla
parent 31eeb6b09f
commit 96bb095486
5 changed files with 255 additions and 1 deletions

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@ -2,7 +2,7 @@
dtb-$(CONFIG_ARCH_VEXPRESS) += \
foundation-v8.dtb foundation-v8-psci.dtb \
foundation-v8-gicv3.dtb foundation-v8-gicv3-psci.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb juno-r2.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb juno-r2.dtb juno-scmi.dtb juno-r1-scmi.dtb juno-r2-scmi.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += fvp-base-revc.dtb

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@ -0,0 +1,23 @@
#include "juno-r1.dts"
#include "juno-scmi.dtsi"
/ {
funnel@20130000 {
power-domains = <&scmi_devpd 8>;
};
etf@20140000 {
power-domains = <&scmi_devpd 0>;
};
funnel@20150000 {
power-domains = <&scmi_devpd 0>;
};
};
&A57_0 {
clocks = <&scmi_dvfs 0>;
};
&A57_1 {
clocks = <&scmi_dvfs 0>;
};

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@ -0,0 +1,23 @@
#include "juno-r2.dts"
#include "juno-scmi.dtsi"
/ {
funnel@20130000 {
power-domains = <&scmi_devpd 8>;
};
etf@20140000 {
power-domains = <&scmi_devpd 0>;
};
funnel@20150000 {
power-domains = <&scmi_devpd 0>;
};
};
&A72_0 {
clocks = <&scmi_dvfs 0>;
};
&A72_1 {
clocks = <&scmi_dvfs 0>;
};

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@ -0,0 +1,9 @@
#include "juno.dts"
#include "juno-scmi.dtsi"
&A57_0 {
clocks = <&scmi_dvfs 0>;
};
&A57_1 {
clocks = <&scmi_dvfs 0>;
};

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@ -0,0 +1,199 @@
/ {
etf@20010000 {
power-domains = <&scmi_devpd 8>;
};
tpiu@20030000 {
power-domains = <&scmi_devpd 8>;
};
funnel@20040000 {
power-domains = <&scmi_devpd 8>;
};
etr@20070000 {
power-domains = <&scmi_devpd 8>;
};
stm@20100000 {
power-domains = <&scmi_devpd 8>;
};
replicator@20120000 {
power-domains = <&scmi_devpd 8>;
};
funnel@220c0000 {
power-domains = <&scmi_devpd 8>;
};
funnel@230c0000 {
power-domains = <&scmi_devpd 8>;
};
hdlcd@7ff50000 {
clocks = <&scmi_clk 3>;
};
hdlcd@7ff60000 {
clocks = <&scmi_clk 3>;
};
/delete-node/ scpi;
firmware {
scmi {
compatible = "arm,scmi";
mbox-names = "tx", "rx";
mboxes = <&mailbox 0 0 &mailbox 0 1>;
shmem = <&cpu_scp_lpri0 &cpu_scp_lpri1>;
#address-cells = <1>;
#size-cells = <0>;
scmi_devpd: protocol@11 {
reg = <0x11>;
#power-domain-cells = <1>;
};
scmi_dvfs: protocol@13 {
reg = <0x13>;
#clock-cells = <1>;
mbox-names = "tx", "rx";
mboxes = <&mailbox 1 0 &mailbox 1 1>;
shmem = <&cpu_scp_hpri0 &cpu_scp_hpri1>;
};
scmi_clk: protocol@14 {
reg = <0x14>;
#clock-cells = <1>;
};
scmi_sensors0: protocol@15 {
reg = <0x15>;
#thermal-sensor-cells = <1>;
};
};
};
thermal-zones {
pmic {
thermal-sensors = <&scmi_sensors0 0>;
};
soc {
thermal-sensors = <&scmi_sensors0 3>;
};
big-cluster {
thermal-sensors = <&scmi_sensors0 21>;
};
little-cluster {
thermal-sensors = <&scmi_sensors0 22>;
};
gpu0 {
thermal-sensors = <&scmi_sensors0 23>;
};
gpu1 {
thermal-sensors = <&scmi_sensors0 24>;
};
};
};
&A53_0 {
clocks = <&scmi_dvfs 1>;
};
&A53_1 {
clocks = <&scmi_dvfs 1>;
};
&A53_2 {
clocks = <&scmi_dvfs 1>;
};
&A53_3 {
clocks = <&scmi_dvfs 1>;
};
&cpu_debug0 {
power-domains = <&scmi_devpd 8>;
};
&cpu_debug1 {
power-domains = <&scmi_devpd 8>;
};
&cpu_debug2 {
power-domains = <&scmi_devpd 8>;
};
&cpu_debug3 {
power-domains = <&scmi_devpd 8>;
};
&cpu_debug4 {
power-domains = <&scmi_devpd 8>;
};
&cpu_debug5 {
power-domains = <&scmi_devpd 8>;
};
&etm0 {
power-domains = <&scmi_devpd 8>;
};
&etm1 {
power-domains = <&scmi_devpd 8>;
};
&etm2 {
power-domains = <&scmi_devpd 8>;
};
&etm3 {
power-domains = <&scmi_devpd 8>;
};
&etm4 {
power-domains = <&scmi_devpd 8>;
};
&etm5 {
power-domains = <&scmi_devpd 8>;
};
&gpu {
clocks = <&scmi_dvfs 2>;
power-domains = <&scmi_devpd 9>;
};
&mailbox {
compatible = "arm,mhu-doorbell", "arm,primecell";
#mbox-cells = <2>;
mbox-name = "ARM-MHU";
};
&smmu_etr {
power-domains = <&scmi_devpd 8>;
};
&smmu_gpu {
power-domains = <&scmi_devpd 9>;
};
&sram {
/delete-node/ scp-sram@0;
/delete-node/ scp-sram@200;
cpu_scp_lpri0: scp-sram@0 {
compatible = "arm,scmi-shmem";
reg = <0x0 0x80>;
};
cpu_scp_lpri1: scp-sram@80 {
compatible = "arm,scmi-shmem";
reg = <0x80 0x80>;
};
cpu_scp_hpri0: scp-sram@100 {
compatible = "arm,scmi-shmem";
reg = <0x100 0x80>;
};
cpu_scp_hpri1: scp-sram@180 {
compatible = "arm,scmi-shmem";
reg = <0x180 0x80>;
};
};