mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-02 16:44:59 +00:00
arm64: dts: mediatek: Introduce the MT8395 Radxa NIO 12L board
Add a device tree for the Radxa NIO 12L SBC, powered by the MediaTek
MT8395 Genio 1200 SoC.
This board features:
* MT6359 + MT6360 PMICs at I2C-6
- Regulators, battery charger, TypeC Port Controller Interface
- Audio through 3.5mm jack (2CH out, 1CH in)
* Two MT6315 PMICs over SPMI
- CPU-Big and GPU Core regulators
* Network Connectivity
- Realtek RTL8211FD MDIO PHY/Transceiver, 10/100/1000M Ethernet
- MT7921E WiFi (PCIe1) / Bluetooth (USB 2.0) combo chip
* Storage
- On-board UFS storage
- On-board eMMC on MMC0 controller
- MicroSD card slot on MMC1 controller
* Other connectivity
- 1x USB Type-C Charging/Power only port
- 1x USB 3.2 SuperSpeed Type-C OTG+DisplayPort mode
- Muxed by ITE IT5205 Alternate Mode Passive MUX
- 4x USB 3.0 Type-A ports on VL805 USB Hub (PCIe0)
- 1x HDMI IN port
- 1x HDMI OUT port
- 1x MIPI DSI (Display) port
- 2x MIPI CSI (Camera) ports
* 40-pin Expansion Header
- Two UART ports
- I2C, SPI busses
- I2S for external audio chips
- ADC
- GPIOs
Link: https://lore.kernel.org/r/20240202114821.79227-3-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
This commit is contained in:
AngeloGioacchino Del Regno
parent
aa3b537355
commit
96564b1e2e
@ -75,4 +75,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-demo.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8365-evk.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-genio-1200-evk.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-radxa-nio-12l.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
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825
arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
Normal file
825
arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
Normal file
@ -0,0 +1,825 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2023 Radxa Limited
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* Copyright (C) 2024 Collabora Ltd.
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* AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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*/
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#include "mt8195.dtsi"
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#include "mt6359.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pinctrl/mt8195-pinfunc.h>
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#include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
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#include <dt-bindings/spmi/spmi.h>
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#include <dt-bindings/usb/pd.h>
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/ {
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model = "Radxa NIO 12L";
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chassis-type = "embedded";
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compatible = "radxa,nio-12l", "mediatek,mt8395", "mediatek,mt8195";
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aliases {
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i2c0 = &i2c2;
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i2c1 = &i2c3;
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i2c2 = &i2c4;
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i2c3 = &i2c0;
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i2c4 = &i2c1;
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ethernet0 = ð
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serial0 = &uart0;
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serial1 = &uart1;
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spi0 = &spi1;
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spi1 = &spi2;
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};
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chosen {
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stdout-path = "serial0:921600n8";
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};
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firmware {
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optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0x1 0x0>;
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};
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wifi_vreg: regulator-wifi-3v3-en {
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compatible = "regulator-fixed";
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regulator-name = "wifi_3v3_en";
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&pio 67 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_vreg_pins>;
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vin-supply = <&vsys>;
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};
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/* system wide switching 5.0V power rail */
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vsys: regulator-vsys {
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compatible = "regulator-fixed";
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regulator-name = "vsys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v0_vsys>;
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};
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vsys_buck: regulator-vsys-buck {
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compatible = "regulator-fixed";
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regulator-name = "vsys_buck";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v0_vsys>;
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};
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/* Rail from power-only "TYPE C DC" port */
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vcc5v0_vsys: regulator-vcc5v0-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/*
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* 12 MiB reserved for OP-TEE (BL32)
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* +-----------------------+ 0x43e0_0000
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* | SHMEM 2MiB |
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* +-----------------------+ 0x43c0_0000
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* | | TA_RAM 8MiB |
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* + TZDRAM +--------------+ 0x4340_0000
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* | | TEE_RAM 2MiB |
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* +-----------------------+ 0x4320_0000
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*/
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optee_reserved: optee@43200000 {
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reg = <0 0x43200000 0 0xc00000>;
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no-map;
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};
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scp_mem: memory@50000000 {
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compatible = "shared-dma-pool";
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reg = <0 0x50000000 0 0x2900000>;
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no-map;
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};
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vpu_mem: memory@53000000 {
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compatible = "shared-dma-pool";
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reg = <0 0x53000000 0 0x1400000>; /* 20 MB */
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};
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/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
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bl31_secmon_mem: memory@54600000 {
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reg = <0 0x54600000 0x0 0x200000>;
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no-map;
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};
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afe_mem: memory@60000000 {
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compatible = "shared-dma-pool";
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reg = <0 0x60000000 0 0x1100000>;
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no-map;
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};
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apu_mem: memory@62000000 {
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compatible = "shared-dma-pool";
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reg = <0 0x62000000 0 0x1400000>; /* 20 MB */
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};
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};
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};
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ð {
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phy-mode = "rgmii-rxid";
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phy-handle = <&rgmii_phy>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <ð_default_pins>;
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pinctrl-1 = <ð_sleep_pins>;
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mediatek,tx-delay-ps = <2030>;
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mediatek,mac-wol;
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snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
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snps,reset-delays-us = <0 20000 100000>;
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status = "okay";
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mdio {
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rgmii_phy: ethernet-phy@1 {
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compatible = "ethernet-phy-id001c.c916";
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reg = <0x1>;
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};
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};
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};
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&gpu {
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mali-supply = <&mt6315_7_vbuck1>;
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-0 = <&i2c2_pins>;
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pinctrl-names = "default";
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status = "okay";
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typec-mux@48 {
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compatible = "ite,it5205";
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reg = <0x48>;
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mode-switch;
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orientation-switch;
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vcc-supply = <&mt6359_vibr_ldo_reg>;
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port {
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it5205_sbu_mux: endpoint {
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remote-endpoint = <&typec_con_mux>;
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};
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};
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};
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};
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&i2c4 {
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clock-frequency = <400000>;
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pinctrl-0 = <&i2c4_pins>;
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pinctrl-names = "default";
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status = "okay";
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/* I2C4 exposed at 39-pins MIPI-LCD connector */
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};
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&i2c6 {
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clock-frequency = <400000>;
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pinctrl-0 = <&i2c6_pins>;
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pinctrl-names = "default";
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status = "okay";
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mt6360: pmic@34 {
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compatible = "mediatek,mt6360";
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reg = <0x34>;
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interrupts-extended = <&pio 101 IRQ_TYPE_EDGE_FALLING>;
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interrupt-names = "IRQB";
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interrupt-controller;
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#interrupt-cells = <1>;
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pinctrl-0 = <&mt6360_pins>;
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charger {
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compatible = "mediatek,mt6360-chg";
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richtek,vinovp-microvolt = <14500000>;
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otg_vbus_regulator: usb-otg-vbus-regulator {
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regulator-name = "usb-otg-vbus";
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regulator-min-microvolt = <4425000>;
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regulator-max-microvolt = <5825000>;
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};
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};
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regulator {
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compatible = "mediatek,mt6360-regulator";
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LDO_VIN1-supply = <&vsys_buck>;
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LDO_VIN3-supply = <&mt6360_buck2>;
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mt6360_buck1: buck1 {
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regulator-name = "emi_vdd2";
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1300000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP
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MT6360_OPMODE_ULP>;
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regulator-always-on;
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};
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mt6360_buck2: buck2 {
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regulator-name = "emi_vddq";
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1300000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP
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MT6360_OPMODE_ULP>;
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regulator-always-on;
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};
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mt6360_ldo1: ldo1 {
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regulator-name = "ext_lcd_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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regulator-always-on;
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};
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mt6360_ldo2: ldo2 {
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regulator-name = "panel1_p1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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};
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mt6360_ldo3: ldo3 {
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regulator-name = "vmc_pmu";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3600000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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};
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mt6360_ldo5: ldo5 {
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regulator-name = "vmch_pmu";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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regulator-always-on;
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};
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mt6360_ldo6: ldo6 {
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regulator-name = "mt6360_ldo6"; /* Test point */
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <2100000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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};
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mt6360_ldo7: ldo7 {
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regulator-name = "emi_vmddr_en";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <2100000>;
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regulator-allowed-modes = <MT6360_OPMODE_NORMAL
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MT6360_OPMODE_LP>;
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regulator-always-on;
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};
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};
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typec {
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compatible = "mediatek,mt6360-tcpc";
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interrupts-extended = <&pio 100 IRQ_TYPE_LEVEL_LOW>;
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interrupt-names = "PD_IRQB";
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connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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op-sink-microwatt = <10000000>;
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power-role = "dual";
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try-power-role = "sink";
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source-pdos = <PDO_FIXED(5000, 1000,
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PDO_FIXED_DUAL_ROLE |
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PDO_FIXED_DATA_SWAP)>;
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sink-pdos = <PDO_FIXED(5000, 3000,
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PDO_FIXED_DUAL_ROLE |
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PDO_FIXED_DATA_SWAP)>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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typec_con_hs: endpoint {
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remote-endpoint = <&mtu3_hs0_role_sw>;
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};
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};
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port@2 {
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reg = <2>;
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typec_con_mux: endpoint {
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remote-endpoint = <&it5205_sbu_mux>;
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};
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};
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};
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};
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};
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};
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};
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/* MMC0 Controller: eMMC (HS400). Power lines are shared with UFS! */
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&mmc0 {
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_default_pins>;
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pinctrl-1 = <&mmc0_uhs_pins>;
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bus-width = <8>;
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max-frequency = <200000000>;
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hs400-ds-delay = <0x14c11>;
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cap-mmc-highspeed;
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cap-mmc-hw-reset;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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no-sdio;
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no-sd;
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non-removable;
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vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
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vqmmc-supply = <&mt6359_vufs_ldo_reg>;
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status = "okay";
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};
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/* MMC1 Controller: MicroSD card slot */
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&mmc1 {
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc1_default_pins>, <&mmc1_pins_detect>;
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pinctrl-1 = <&mmc1_default_pins>;
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bus-width = <4>;
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max-frequency = <200000000>;
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cap-sd-highspeed;
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cd-gpios = <&pio 129 GPIO_ACTIVE_LOW>;
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no-mmc;
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no-sdio;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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vmmc-supply = <&mt6360_ldo5>;
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vqmmc-supply = <&mt6360_ldo3>;
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status = "okay";
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};
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&mt6359_vaud18_ldo_reg {
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regulator-always-on;
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};
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&mt6359_vbbck_ldo_reg {
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regulator-always-on;
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};
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/* For USB Hub */
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&mt6359_vcamio_ldo_reg {
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regulator-always-on;
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};
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&mt6359_vcn33_2_bt_ldo_reg {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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&mt6359_vcore_buck_reg {
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regulator-always-on;
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};
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&mt6359_vgpu11_buck_reg {
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regulator-always-on;
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};
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&mt6359_vproc1_buck_reg {
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regulator-always-on;
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};
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&mt6359_vproc2_buck_reg {
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regulator-always-on;
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};
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&mt6359_vpu_buck_reg {
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regulator-always-on;
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};
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&mt6359_vrf12_ldo_reg {
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regulator-always-on;
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};
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||||
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&mt6359_vsram_md_ldo_reg {
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regulator-always-on;
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||||
};
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||||
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||||
/* for GPU SRAM */
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&mt6359_vsram_others_ldo_reg {
|
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regulator-min-microvolt = <750000>;
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||||
regulator-max-microvolt = <750000>;
|
||||
};
|
||||
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&pio {
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eth_default_pins: eth-default-pins {
|
||||
pins-cc {
|
||||
pinmux = <PINMUX_GPIO85__FUNC_GBE_TXC>,
|
||||
<PINMUX_GPIO86__FUNC_GBE_RXC>,
|
||||
<PINMUX_GPIO87__FUNC_GBE_RXDV>,
|
||||
<PINMUX_GPIO88__FUNC_GBE_TXEN>;
|
||||
drive-strength = <8>;
|
||||
};
|
||||
|
||||
pins-mdio {
|
||||
pinmux = <PINMUX_GPIO89__FUNC_GBE_MDC>,
|
||||
<PINMUX_GPIO90__FUNC_GBE_MDIO>;
|
||||
input-enable;
|
||||
};
|
||||
|
||||
pins-power {
|
||||
pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
|
||||
<PINMUX_GPIO92__FUNC_GPIO92>;
|
||||
output-high;
|
||||
};
|
||||
|
||||
pins-rst {
|
||||
pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
|
||||
};
|
||||
|
||||
pins-rxd {
|
||||
pinmux = <PINMUX_GPIO81__FUNC_GBE_RXD3>,
|
||||
<PINMUX_GPIO82__FUNC_GBE_RXD2>,
|
||||
<PINMUX_GPIO83__FUNC_GBE_RXD1>,
|
||||
<PINMUX_GPIO84__FUNC_GBE_RXD0>;
|
||||
};
|
||||
|
||||
pins-txd {
|
||||
pinmux = <PINMUX_GPIO77__FUNC_GBE_TXD3>,
|
||||
<PINMUX_GPIO78__FUNC_GBE_TXD2>,
|
||||
<PINMUX_GPIO79__FUNC_GBE_TXD1>,
|
||||
<PINMUX_GPIO80__FUNC_GBE_TXD0>;
|
||||
drive-strength = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
eth_sleep_pins: eth-sleep-pins {
|
||||
pins-cc {
|
||||
pinmux = <PINMUX_GPIO85__FUNC_GPIO85>,
|
||||
<PINMUX_GPIO86__FUNC_GPIO86>,
|
||||
<PINMUX_GPIO87__FUNC_GPIO87>,
|
||||
<PINMUX_GPIO88__FUNC_GPIO88>;
|
||||
};
|
||||
|
||||
pins-mdio {
|
||||
pinmux = <PINMUX_GPIO89__FUNC_GPIO89>,
|
||||
<PINMUX_GPIO90__FUNC_GPIO90>;
|
||||
bias-disable;
|
||||
input-disable;
|
||||
};
|
||||
|
||||
pins-rxd {
|
||||
pinmux = <PINMUX_GPIO81__FUNC_GPIO81>,
|
||||
<PINMUX_GPIO82__FUNC_GPIO82>,
|
||||
<PINMUX_GPIO83__FUNC_GPIO83>,
|
||||
<PINMUX_GPIO84__FUNC_GPIO84>;
|
||||
};
|
||||
|
||||
pins-txd {
|
||||
pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
|
||||
<PINMUX_GPIO78__FUNC_GPIO78>,
|
||||
<PINMUX_GPIO79__FUNC_GPIO79>,
|
||||
<PINMUX_GPIO80__FUNC_GPIO80>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2-pins {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO12__FUNC_SDA2>,
|
||||
<PINMUX_GPIO13__FUNC_SCL2>;
|
||||
bias-pull-up = <MTK_PULL_SET_RSEL_111>;
|
||||
drive-strength = <6>;
|
||||
drive-strength-microamp = <1000>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c4_pins: i2c4-pins {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
|
||||
<PINMUX_GPIO17__FUNC_SCL4>;
|
||||
bias-pull-up = <MTK_PULL_SET_RSEL_111>;
|
||||
drive-strength-microamp = <1000>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c6_pins: i2c6-pins {
|
||||
pins {
|
||||
pinmux = <PINMUX_GPIO25__FUNC_SDA6>,
|
||||
<PINMUX_GPIO26__FUNC_SCL6>;
|
||||
bias-pull-up = <MTK_PULL_SET_RSEL_111>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_default_pins: mmc0-default-pins {
|
||||
pins-clk {
|
||||
pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
||||
drive-strength = <6>;
|
||||
};
|
||||
|
||||
pins-cmd-dat {
|
||||
pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
|
||||
<PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
|
||||
<PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
|
||||
<PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
|
||||
<PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
|
||||
<PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
|
||||
<PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
|
||||
<PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
|
||||
<PINMUX_GPIO121__FUNC_MSDC0_CMD>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
||||
drive-strength = <6>;
|
||||
input-enable;
|
||||
};
|
||||
|
||||
pins-rst {
|
||||
pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
||||
drive-strength = <6>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_uhs_pins: mmc0-uhs-pins {
|
||||
pins-clk {
|
||||
pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
||||
drive-strength = <8>;
|
||||
};
|
||||
|
||||
pins-cmd-dat {
|
||||
pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
|
||||
<PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
|
||||
<PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
|
||||
<PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
|
||||
<PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
|
||||
<PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
|
||||
<PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
|
||||
<PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
|
||||
<PINMUX_GPIO121__FUNC_MSDC0_CMD>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
||||
drive-strength = <8>;
|
||||
input-enable;
|
||||
};
|
||||
|
||||
pins-ds {
|
||||
pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
||||
drive-strength = <8>;
|
||||
};
|
||||
|
||||
pins-rst {
|
||||
pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
||||
drive-strength = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1_default_pins: mmc1-default-pins {
|
||||
pins-clk {
|
||||
pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
||||
drive-strength = <8>;
|
||||
};
|
||||
|
||||
pins-cmd-dat {
|
||||
pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
|
||||
<PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
|
||||
<PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
|
||||
<PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
|
||||
<PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
||||
drive-strength = <8>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1_pins_detect: mmc1-detect-pins {
|
||||
pins-insert {
|
||||
pinmux = <PINMUX_GPIO129__FUNC_GPIO129>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
mt6360_pins: mt6360-pins {
|
||||
pins-irq {
|
||||
pinmux = <PINMUX_GPIO100__FUNC_GPIO100>,
|
||||
<PINMUX_GPIO101__FUNC_GPIO101>;
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_default_pins: pcie0-default-pins {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
|
||||
<PINMUX_GPIO20__FUNC_PERSTN>,
|
||||
<PINMUX_GPIO21__FUNC_CLKREQN>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
pcie1_default_pins: pcie1-default-pins {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO0__FUNC_PERSTN_1>,
|
||||
<PINMUX_GPIO1__FUNC_CLKREQN_1>,
|
||||
<PINMUX_GPIO2__FUNC_WAKEN_1>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
spi1_pins: spi1-default-pins {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO136__FUNC_SPIM1_CSB>,
|
||||
<PINMUX_GPIO137__FUNC_SPIM1_CLK>,
|
||||
<PINMUX_GPIO138__FUNC_SPIM1_MO>,
|
||||
<PINMUX_GPIO139__FUNC_SPIM1_MI>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
spi2_pins: spi2-default-pins {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO140__FUNC_SPIM2_CSB>,
|
||||
<PINMUX_GPIO141__FUNC_SPIM2_CLK>,
|
||||
<PINMUX_GPIO142__FUNC_SPIM2_MO>,
|
||||
<PINMUX_GPIO143__FUNC_SPIM2_MI>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
uart0_pins: uart0-pins {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO98__FUNC_UTXD0>,
|
||||
<PINMUX_GPIO99__FUNC_URXD0>;
|
||||
};
|
||||
};
|
||||
|
||||
uart1_pins: uart1-pins {
|
||||
pins-bus {
|
||||
pinmux = <PINMUX_GPIO102__FUNC_UTXD1>,
|
||||
<PINMUX_GPIO103__FUNC_URXD1>;
|
||||
};
|
||||
};
|
||||
|
||||
wifi_vreg_pins: wifi-vreg-pins {
|
||||
pins-wifi-pmu-en {
|
||||
pinmux = <PINMUX_GPIO65__FUNC_GPIO65>;
|
||||
output-high;
|
||||
};
|
||||
|
||||
pins-wifi-vreg-en {
|
||||
pinmux = <PINMUX_GPIO67__FUNC_GPIO67>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie0_default_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie1_default_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pmic {
|
||||
interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
&scp {
|
||||
memory-region = <&scp_mem>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
/* Exposed at 40 pin connector */
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
pinctrl-names = "default";
|
||||
mediatek,pad-select = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi2 {
|
||||
/* Exposed at 40 pin connector */
|
||||
pinctrl-0 = <&spi2_pins>;
|
||||
pinctrl-names = "default";
|
||||
mediatek,pad-select = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spmi {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mt6315_6: pmic@6 {
|
||||
compatible = "mediatek,mt6315-regulator";
|
||||
reg = <0x6 SPMI_USID>;
|
||||
|
||||
regulators {
|
||||
mt6315_6_vbuck1: vbuck1 {
|
||||
regulator-compatible = "vbuck1";
|
||||
regulator-name = "Vbcpu";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1193750>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-allowed-modes = <0 1 2>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mt6315_7: pmic@7 {
|
||||
compatible = "mediatek,mt6315-regulator";
|
||||
reg = <0x7 SPMI_USID>;
|
||||
|
||||
regulators {
|
||||
mt6315_7_vbuck1: vbuck1 {
|
||||
regulator-compatible = "vbuck1";
|
||||
regulator-name = "Vgpu";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1193750>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-allowed-modes = <0 1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
/* Exposed at 40 pin connector */
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
/* Exposed at 40 pin connector */
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssusb0 {
|
||||
role-switch-default-mode = "host";
|
||||
usb-role-switch;
|
||||
vusb33-supply = <&mt6359_vusb_ldo_reg>;
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
mtu3_hs0_role_sw: endpoint {
|
||||
remote-endpoint = <&typec_con_hs>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ssusb2 {
|
||||
vusb33-supply = <&mt6359_vusb_ldo_reg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&xhci0 {
|
||||
vbus-supply = <&otg_vbus_regulator>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&xhci1 {
|
||||
/* MT7921's USB Bluetooth has issues with USB2 LPM */
|
||||
usb2-lpm-disable;
|
||||
vusb33-supply = <&mt6359_vusb_ldo_reg>;
|
||||
vbus-supply = <&vsys>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&xhci2 {
|
||||
vbus-supply = <&vsys>;
|
||||
status = "okay";
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user