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drm/amd/display: Don't allow IPS2 in D0 for RCG Dynamic

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[Why]
The existing changes to the DPMS off flag should help reduce
accidental entry, but this change further restricts the entry condition.

[How]
Record last power state as sent to DMUB.
Don't send IPS2 allow if it's D0.

Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Nicholas Kazlauskas 2024-11-13 13:32:36 -05:00 committed by Alex Deucher
parent 70fec46519
commit 8488646966
2 changed files with 5 additions and 1 deletions
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5
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
View File

@ -1313,7 +1313,8 @@ static void dc_dmub_srv_notify_idle(const struct dc *dc, bool allow_idle)
new_signals.bits.allow_ips2 = 1;
} else if (dc->config.disable_ips == DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF) {
/* TODO: Move this logic out to hwseq */
if (count_active_streams(dc) == 0) {
if (dc_dmub_srv->last_power_state == DC_ACPI_CM_POWER_STATE_D3 &&
count_active_streams(dc) == 0) {
/* IPS2 - Display off */
new_signals.bits.allow_pg = 1;
new_signals.bits.allow_ips1 = 1;
@ -1517,6 +1518,8 @@ void dc_dmub_srv_notify_fw_dc_power_state(struct dc_dmub_srv *dc_dmub_srv,
}
dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT);
dc_dmub_srv->last_power_state = power_state;
}
bool dc_dmub_srv_should_detect(struct dc_dmub_srv *dc_dmub_srv)

1
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
View File

@ -56,6 +56,7 @@ struct dc_dmub_srv {
union dmub_shared_state_ips_driver_signals driver_signals;
bool idle_allowed;
bool needs_idle_wake;
enum dc_acpi_cm_power_state last_power_state;
};
void dc_dmub_srv_wait_idle(struct dc_dmub_srv *dc_dmub_srv);