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arm64: dts: renesas: r8a774c0: Create thermal zone to support IPA

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Setup a thermal zone driven by SoC temperature sensor.
Create passive trip points and bind them to CPUFreq cooling
device that supports power extension.

Based on the work done by Dien Pham <dien.pham.ry@renesas.com>
and others for r8a77990 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/1568364608-46548-1-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2019-09-13 09:50:07 +01:00 committed by Geert Uytterhoeven
parent 28a1b34c00
commit 8438bfda9d
1 changed files with 16 additions and 3 deletions
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19
arch/arm64/boot/dts/renesas/r8a774c0.dtsi
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@ -73,6 +73,7 @@ a53_0: cpu@0 {
compatible = "arm,cortex-a53"; compatible = "arm,cortex-a53";
reg = <0>; reg = <0>;
device_type = "cpu"; device_type = "cpu";
#cooling-cells = <2>;
power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; power-domains = <&sysc R8A774C0_PD_CA53_CPU0>;
next-level-cache = <&L2_CA53>; next-level-cache = <&L2_CA53>;
enable-method = "psci"; enable-method = "psci";
@ -1905,18 +1906,30 @@ prr: chipid@fff00044 {
thermal-zones { thermal-zones {
cpu-thermal { cpu-thermal {
polling-delay-passive = <250>; polling-delay-passive = <250>;
polling-delay = <1000>; polling-delay = <0>;
thermal-sensors = <&thermal>; thermal-sensors = <&thermal 0>;
sustainable-power = <717>;
cooling-maps { cooling-maps {
map0 {
trip = <&target>;
cooling-device = <&a53_0 0 2>;
contribution = <1024>;
};
}; };
trips { trips {
cpu-crit { sensor1_crit: sensor1-crit {
temperature = <120000>; temperature = <120000>;
hysteresis = <2000>; hysteresis = <2000>;
type = "critical"; type = "critical";
}; };
target: trip-point1 {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};
}; };
}; };
}; };