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arch: x86: add IPC mailbox accessor function and add SoC register access
- Exports intel_pmc_ipc() for host access to the PMC IPC mailbox - Enables the host to access specific SoC registers through the PMC firmware using IPC commands. This access method is necessary for registers that are not available through direct Memory-Mapped I/O (MMIO), which is used for other accessible parts of the PMC. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Signed-off-by: Chao Qin <chao.qin@intel.com> Signed-off-by: Choong Yong Liang <yong.liang.choong@linux.intel.com> Acked-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://patch.msgid.link/20250227121522.1802832-4-yong.liang.choong@linux.intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -11862,6 +11862,7 @@ L: platform-driver-x86@vger.kernel.org
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S: Maintained
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F: Documentation/ABI/testing/sysfs-platform-intel-pmc
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F: drivers/platform/x86/intel/pmc/
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F: linux/platform_data/x86/intel_pmc_ipc.h
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INTEL PMIC GPIO DRIVERS
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M: Andy Shevchenko <andy@kernel.org>
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94
include/linux/platform_data/x86/intel_pmc_ipc.h
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94
include/linux/platform_data/x86/intel_pmc_ipc.h
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@ -0,0 +1,94 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Intel Core SoC Power Management Controller Header File
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*
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* Copyright (c) 2025, Intel Corporation.
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* All Rights Reserved.
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*
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*/
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#ifndef INTEL_PMC_IPC_H
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#define INTEL_PMC_IPC_H
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#include <linux/acpi.h>
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#define IPC_SOC_REGISTER_ACCESS 0xAA
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#define IPC_SOC_SUB_CMD_READ 0x00
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#define IPC_SOC_SUB_CMD_WRITE 0x01
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#define PMC_IPCS_PARAM_COUNT 7
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#define VALID_IPC_RESPONSE 5
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struct pmc_ipc_cmd {
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u32 cmd;
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u32 sub_cmd;
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u32 size;
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u32 wbuf[4];
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};
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struct pmc_ipc_rbuf {
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u32 buf[4];
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};
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/**
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* intel_pmc_ipc() - PMC IPC Mailbox accessor
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* @ipc_cmd: Prepared input command to send
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* @rbuf: Allocated array for returned IPC data
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*
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* Return: 0 on success. Non-zero on mailbox error
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*/
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static inline int intel_pmc_ipc(struct pmc_ipc_cmd *ipc_cmd, struct pmc_ipc_rbuf *rbuf)
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{
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struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
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union acpi_object params[PMC_IPCS_PARAM_COUNT] = {
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{.type = ACPI_TYPE_INTEGER,},
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{.type = ACPI_TYPE_INTEGER,},
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{.type = ACPI_TYPE_INTEGER,},
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{.type = ACPI_TYPE_INTEGER,},
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{.type = ACPI_TYPE_INTEGER,},
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{.type = ACPI_TYPE_INTEGER,},
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{.type = ACPI_TYPE_INTEGER,},
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};
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struct acpi_object_list arg_list = { PMC_IPCS_PARAM_COUNT, params };
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union acpi_object *obj;
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int status;
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if (!ipc_cmd || !rbuf)
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return -EINVAL;
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/*
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* 0: IPC Command
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* 1: IPC Sub Command
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* 2: Size
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* 3-6: Write Buffer for offset
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*/
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params[0].integer.value = ipc_cmd->cmd;
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params[1].integer.value = ipc_cmd->sub_cmd;
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params[2].integer.value = ipc_cmd->size;
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params[3].integer.value = ipc_cmd->wbuf[0];
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params[4].integer.value = ipc_cmd->wbuf[1];
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params[5].integer.value = ipc_cmd->wbuf[2];
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params[6].integer.value = ipc_cmd->wbuf[3];
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status = acpi_evaluate_object(NULL, "\\IPCS", &arg_list, &buffer);
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if (ACPI_FAILURE(status))
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return -ENODEV;
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obj = buffer.pointer;
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if (obj && obj->type == ACPI_TYPE_PACKAGE &&
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obj->package.count == VALID_IPC_RESPONSE) {
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const union acpi_object *objs = obj->package.elements;
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if ((u8)objs[0].integer.value != 0)
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return -EINVAL;
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rbuf->buf[0] = objs[1].integer.value;
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rbuf->buf[1] = objs[2].integer.value;
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rbuf->buf[2] = objs[3].integer.value;
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rbuf->buf[3] = objs[4].integer.value;
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} else {
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return -EINVAL;
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}
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return 0;
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}
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#endif /* INTEL_PMC_IPC_H */
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