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arm64: dts: layerscape: remove big-endian for mmc nodes
According to binding doc fsl,esdhc.yaml, the default endian mode is big-endian. So remove big-endian property to fix below CHECK_DTBS warnings: arm64/boot/dts/freescale/fsl-ls1012a-qds.dtb: mmc@1560000: Unevaluated properties are not allowed ('big-endian' was unexpected) from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -164,7 +164,6 @@ esdhc0: mmc@1560000 {
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QORIQ_CLK_PLL_DIV(1)>;
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voltage-ranges = <1800 1800 3300 3300>;
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sdhci,auto-cmd12;
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big-endian;
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bus-width = <4>;
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status = "disabled";
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};
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@ -183,7 +182,6 @@ esdhc1: mmc@1580000 {
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QORIQ_CLK_PLL_DIV(1)>;
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voltage-ranges = <1800 1800 3300 3300>;
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sdhci,auto-cmd12;
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big-endian;
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broken-cd;
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bus-width = <4>;
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status = "disabled";
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@ -431,7 +431,6 @@ esdhc: mmc@1560000 {
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clock-frequency = <0>;
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voltage-ranges = <1800 1800 3300 3300>;
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sdhci,auto-cmd12;
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big-endian;
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bus-width = <4>;
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};
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@ -315,7 +315,6 @@ esdhc: mmc@1560000 {
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clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;
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voltage-ranges = <1800 1800 3300 3300>;
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sdhci,auto-cmd12;
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big-endian;
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bus-width = <4>;
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};
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@ -694,7 +693,6 @@ wdog0: watchdog@2ad0000 {
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
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QORIQ_CLK_PLL_DIV(2)>;
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big-endian;
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};
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edma0: dma-controller@2c00000 {
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