arm64: dts: qcom: add QCS8300 platform

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Add initial DTSI for QCS8300 SoC.

Features added in this revision:
- CPUs with PSCI idle states
- Interrupt-controller with PDC wakeup support
- Timers, TCSR Clock Controllers
- Reserved Shared memory
- GCC and RPMHCC
- TLMM
- Interconnect
- QuP with uart
- SMMU
- QFPROM
- Rpmhpd power controller
- UFS
- Inter-Processor Communication Controller
- SRAM
- Remoteprocs including ADSP,CDSP and GPDSP
- BWMONs

Written with help from Zhenhua Huang(added the smmu node), Xin Liu(added
ufs, adsp and gpdsp nodes), Tingguo Cheng(added the rpmhpd node), Kyle
Deng(added the aoss_qmp node), Raviteja Laggyshetty(added interconnect
nodes) and Cong Zhang(added the INTID of EL2 non-secure physical timer).

Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/r/20241203-qcs8300_initial_dtsi-v4-3-d7c953484024@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

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Jingyi Wang 2024-12-03 17:27:14 +08:00 committed by Bjorn Andersson

parent d511280ce9

commit 7be190e4bd

1 changed files with 1405 additions and 0 deletions

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