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arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients

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Add dynamic power coefficients for Silver and Gold CPUs on
SC7180 SoC.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1578393926-5052-1-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Rajendra Nayak 2020-01-07 16:15:24 +05:30 committed by Bjorn Andersson
parent 1e8277854b
commit 71f873169a
1 changed files with 8 additions and 0 deletions
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8
arch/arm64/boot/dts/qcom/sc7180.dtsi
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@ -89,6 +89,7 @@ CPU0: cpu@0 {
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x0>; reg = <0x0 0x0>;
enable-method = "psci"; enable-method = "psci";
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_0>; next-level-cache = <&L2_0>;
#cooling-cells = <2>; #cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>; qcom,freq-domain = <&cpufreq_hw 0>;
@ -106,6 +107,7 @@ CPU1: cpu@100 {
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x100>; reg = <0x0 0x100>;
enable-method = "psci"; enable-method = "psci";
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_100>; next-level-cache = <&L2_100>;
#cooling-cells = <2>; #cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>; qcom,freq-domain = <&cpufreq_hw 0>;
@ -120,6 +122,7 @@ CPU2: cpu@200 {
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x200>; reg = <0x0 0x200>;
enable-method = "psci"; enable-method = "psci";
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_200>; next-level-cache = <&L2_200>;
#cooling-cells = <2>; #cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>; qcom,freq-domain = <&cpufreq_hw 0>;
@ -134,6 +137,7 @@ CPU3: cpu@300 {
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x300>; reg = <0x0 0x300>;
enable-method = "psci"; enable-method = "psci";
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_300>; next-level-cache = <&L2_300>;
#cooling-cells = <2>; #cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>; qcom,freq-domain = <&cpufreq_hw 0>;
@ -148,6 +152,7 @@ CPU4: cpu@400 {
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x400>; reg = <0x0 0x400>;
enable-method = "psci"; enable-method = "psci";
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_400>; next-level-cache = <&L2_400>;
#cooling-cells = <2>; #cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>; qcom,freq-domain = <&cpufreq_hw 0>;
@ -162,6 +167,7 @@ CPU5: cpu@500 {
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x500>; reg = <0x0 0x500>;
enable-method = "psci"; enable-method = "psci";
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_500>; next-level-cache = <&L2_500>;
#cooling-cells = <2>; #cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>; qcom,freq-domain = <&cpufreq_hw 0>;
@ -176,6 +182,7 @@ CPU6: cpu@600 {
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x600>; reg = <0x0 0x600>;
enable-method = "psci"; enable-method = "psci";
dynamic-power-coefficient = <405>;
next-level-cache = <&L2_600>; next-level-cache = <&L2_600>;
#cooling-cells = <2>; #cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 1>; qcom,freq-domain = <&cpufreq_hw 1>;
@ -190,6 +197,7 @@ CPU7: cpu@700 {
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x700>; reg = <0x0 0x700>;
enable-method = "psci"; enable-method = "psci";
dynamic-power-coefficient = <405>;
next-level-cache = <&L2_700>; next-level-cache = <&L2_700>;
#cooling-cells = <2>; #cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 1>; qcom,freq-domain = <&cpufreq_hw 1>;