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arm64: dts: ti: k3-am69-sk: Add DP and HDMI support
AM69 starter kit features an HDMI port and an eDP port. Add assigned clocks for DSS, DT node for DisplayPort PHY, pinmux for HDMI hotplug and power down, mcu_i2c1 and dss_vout for HDMI. Also enable Serdes4 settings for DP display. Add the endpoint nodes to describe connection from: DSS => MHDP => DisplayPort connector DSS => TI TFP410 DPI-to-DVI Bridge => HDMI connector Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com> [j-choudhary@ti.com: Fix dvi-bridge, dss, mhdp and serdes-refclk] Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20231019054022.175163-6-j-choudhary@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Dasnavis Sabiya
Vignesh Raghavendra
parent
0da6b5d6a1
commit
6f8605fd7d
@ -251,6 +251,76 @@ vdd_sd_dv: regulator-tlv71033 {
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states = <1800000 0x0>,
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<3300000 0x1>;
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};
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dp0_pwr_3v3: regulator-dp0-pwr {
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compatible = "regulator-fixed";
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regulator-name = "dp0-pwr";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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pinctrl-names = "default";
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pinctrl-0 = <&dp_pwr_en_pins_default>;
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gpio = <&main_gpio0 4 0>; /* DP0_3V3 _EN */
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enable-active-high;
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};
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dp0: connector-dp0 {
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compatible = "dp-connector";
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label = "DP0";
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type = "full-size";
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dp-pwr-supply = <&dp0_pwr_3v3>;
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port {
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dp0_connector_in: endpoint {
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remote-endpoint = <&dp0_out>;
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};
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};
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};
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connector-hdmi {
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compatible = "hdmi-connector";
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label = "hdmi";
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type = "a";
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_hpd_pins_default>;
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ddc-i2c-bus = <&mcu_i2c1>;
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hpd-gpios = <&main_gpio0 0 GPIO_ACTIVE_HIGH>; /* HDMI_HPD */
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port {
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hdmi_connector_in: endpoint {
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remote-endpoint = <&tfp410_out>;
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};
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};
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};
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bridge-dvi {
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compatible = "ti,tfp410";
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_pdn_pins_default>;
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powerdown-gpios = <&wkup_gpio0 14 GPIO_ACTIVE_LOW>; /* HDMI_PDn */
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ti,deskew = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tfp410_in: endpoint {
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remote-endpoint = <&dpi1_out0>;
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pclk-sample = <1>;
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};
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};
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port@1 {
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reg = <1>;
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tfp410_out: endpoint {
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remote-endpoint = <&hdmi_connector_in>;
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};
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};
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};
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};
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};
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&main_pmx0 {
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@ -308,6 +378,57 @@ J784S4_IOPAD(0x008, PIN_INPUT, 7) /* (AJ33) MCAN12_RX.GPIO0_2 */
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J784S4_IOPAD(0x004, PIN_INPUT, 7) /* (AG36) MCAN12_TX.GPIO0_1 */
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>;
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};
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dp0_pins_default: dp0-default-pins {
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pinctrl-single,pins = <
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J784S4_IOPAD(0x014, PIN_INPUT, 13) /* (AG33) MCAN14_TX.DP0_HPD */
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>;
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};
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dp_pwr_en_pins_default: dp-pwr-en-default-pins {
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pinctrl-single,pins = <
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J784S4_IOPAD(0x010, PIN_INPUT, 7) /* (AH33) MCAN13_RX.GPIO0_4 */
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>;
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};
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dss_vout0_pins_default: dss-vout0-default-pins {
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pinctrl-single,pins = <
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J784S4_IOPAD(0x074, PIN_OUTPUT, 2) /* (AC33) MCAN2_TX.VOUT0_DATA0 */
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J784S4_IOPAD(0x070, PIN_OUTPUT, 2) /* (AH38) MCAN1_RX.VOUT0_DATA1 */
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J784S4_IOPAD(0x07c, PIN_OUTPUT, 2) /* (AJ38) MCASP0_AXR3.VOUT0_DATA2 */
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J784S4_IOPAD(0x068, PIN_OUTPUT, 2) /* (AE38) MCAN0_RX.VOUT0_DATA3 */
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J784S4_IOPAD(0x064, PIN_OUTPUT, 2) /* (AF38) MCAN0_TX.VOUT0_DATA4 */
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J784S4_IOPAD(0x060, PIN_OUTPUT, 2) /* (AE36) MCASP2_AXR1.VOUT0_DATA5 */
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J784S4_IOPAD(0x05c, PIN_OUTPUT, 2) /* (AC36) MCASP2_AXR0.VOUT0_DATA6 */
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J784S4_IOPAD(0x058, PIN_OUTPUT, 2) /* (AE37) MCASP2_AFSX.VOUT0_DATA7 */
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J784S4_IOPAD(0x054, PIN_OUTPUT, 2) /* (AD37) MCASP2_ACLKX.VOUT0_DATA8 */
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J784S4_IOPAD(0x050, PIN_OUTPUT, 2) /* (AC37) MCASP1_AXR2.VOUT0_DATA9 */
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J784S4_IOPAD(0x04c, PIN_OUTPUT, 2) /* (AC32) MCASP1_AXR1.VOUT0_DATA10 */
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J784S4_IOPAD(0x048, PIN_OUTPUT, 2) /* (AK33) MCASP0_AXR2.VOUT0_DATA11 */
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J784S4_IOPAD(0x044, PIN_OUTPUT, 2) /* (AG37) MCASP0_AXR1.VOUT0_DATA12 */
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J784S4_IOPAD(0x040, PIN_OUTPUT, 2) /* (AF37) MCASP0_AXR0.VOUT0_DATA13 */
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J784S4_IOPAD(0x03c, PIN_OUTPUT, 2) /* (AK38) MCASP0_AFSX.VOUT0_DATA14 */
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J784S4_IOPAD(0x038, PIN_OUTPUT, 2) /* (AK35) MCASP0_ACLKX.VOUT0_DATA15 */
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J784S4_IOPAD(0x0c8, PIN_OUTPUT, 2) /* (AJ32) EXT_REFCLK1.VOUT0_DATA16 */
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J784S4_IOPAD(0x030, PIN_OUTPUT, 2) /* (AK37) GPIO0_12.VOUT0_DATA17 */
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J784S4_IOPAD(0x02c, PIN_OUTPUT, 2) /* (AL32) GPIO0_11.VOUT0_DATA18 */
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J784S4_IOPAD(0x028, PIN_OUTPUT, 2) /* (AE33) MCAN16_RX.VOUT0_DATA19 */
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J784S4_IOPAD(0x024, PIN_OUTPUT, 2) /* (AH34) MCAN16_TX.VOUT0_DATA20 */
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J784S4_IOPAD(0x020, PIN_OUTPUT, 2) /* (AJ35) MCAN15_RX.VOUT0_DATA21 */
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J784S4_IOPAD(0x01c, PIN_OUTPUT, 2) /* (AG34) MCAN15_TX.VOUT0_DATA22 */
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J784S4_IOPAD(0x018, PIN_OUTPUT, 2) /* (AK36) MCAN14_RX.VOUT0_DATA23 */
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J784S4_IOPAD(0x084, PIN_OUTPUT, 2) /* (AG38) MCASP0_AXR5.VOUT0_DE */
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J784S4_IOPAD(0x080, PIN_OUTPUT, 2) /* (AK34) MCASP0_AXR4.VOUT0_HSYNC */
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J784S4_IOPAD(0x078, PIN_OUTPUT, 2) /* (AH37) MCAN2_RX.VOUT0_PCLK */
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J784S4_IOPAD(0x088, PIN_OUTPUT, 2) /* (AF36) MCASP0_AXR6.VOUT0_VSYNC */
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>;
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};
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hdmi_hpd_pins_default: hdmi-hpd-default-pins {
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pinctrl-single,pins = <
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J784S4_IOPAD(0x000, PIN_INPUT, 7) /* (AN35) EXTINTN.GPIO0_0 */
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>;
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};
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};
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&wkup_pmx2 {
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@ -382,6 +503,21 @@ J784S4_WKUP_IOPAD(0x064, PIN_INPUT, 7) /* (J36) WKUP_GPIO0_3 */
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J784S4_WKUP_IOPAD(0x11c, PIN_INPUT, 7) /* (M34) WKUP_GPIO0_67 */
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>;
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};
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mcu_i2c1_pins_default: mcu-i2c1-default-pins {
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pinctrl-single,pins = <
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/* (L35) WKUP_GPIO0_8.MCU_I2C1_SCL */
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J784S4_WKUP_IOPAD(0x078, PIN_INPUT_PULLUP, 0)
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/* (L34) WKUP_GPIO0_9.MCU_I2C1_SDA */
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J784S4_WKUP_IOPAD(0x07c, PIN_INPUT_PULLUP, 0)
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>;
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};
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hdmi_pdn_pins_default: hdmi-pdn-default-pins {
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pinctrl-single,pins = <
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J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 7) /* (H37) WKUP_GPIO0_14 */
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>;
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};
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};
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&wkup_pmx3 {
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@ -666,3 +802,99 @@ &c71_3 {
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memory-region = <&c71_3_dma_memory_region>,
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<&c71_3_memory_region>;
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};
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&wkup_gpio_intr {
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status = "okay";
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};
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&mcu_i2c1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_i2c1_pins_default>;
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clock-frequency = <100000>;
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};
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&serdes_refclk {
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status = "okay";
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clock-frequency = <100000000>;
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};
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&dss {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&dss_vout0_pins_default>;
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assigned-clocks = <&k3_clks 218 2>,
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<&k3_clks 218 5>,
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<&k3_clks 218 14>,
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<&k3_clks 218 18>;
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assigned-clock-parents = <&k3_clks 218 3>,
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<&k3_clks 218 7>,
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<&k3_clks 218 16>,
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<&k3_clks 218 22>;
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};
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&serdes_wiz4 {
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status = "okay";
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};
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&serdes4 {
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status = "okay";
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serdes4_dp_link: phy@0 {
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reg = <0>;
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cdns,num-lanes = <4>;
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#phy-cells = <0>;
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cdns,phy-type = <PHY_TYPE_DP>;
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resets = <&serdes_wiz4 1>, <&serdes_wiz4 2>,
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<&serdes_wiz4 3>, <&serdes_wiz4 4>;
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};
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};
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&mhdp {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&dp0_pins_default>;
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phys = <&serdes4_dp_link>;
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phy-names = "dpphy";
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};
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&dss_ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* DP */
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port@0 {
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reg = <0>;
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dpi0_out: endpoint {
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remote-endpoint = <&dp0_in>;
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};
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};
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/* HDMI */
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port@1 {
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reg = <1>;
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dpi1_out0: endpoint {
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remote-endpoint = <&tfp410_in>;
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};
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};
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};
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&dp0_ports {
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port@0 {
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reg = <0>;
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dp0_in: endpoint {
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remote-endpoint = <&dpi0_out>;
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};
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};
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port@4 {
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reg = <4>;
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dp0_out: endpoint {
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remote-endpoint = <&dp0_connector_in>;
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};
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};
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};
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