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drm/xe: enable lite restore
The lite restore is a performance improvement feature which avoids unnecessary context switch (flush, save and restore) if the incoming context has a ContextID matching that of the outgoing context. The scheduling is done by the GuC firmware, so on the driver side it's just a matter of setting corresponding GUC_CTL_FEATURE flag. This is supposed to be enabled by default, thus the flag is set unconditionally. Signed-off-by: Fei Yang <fei.yang@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241017162710.942553-2-fei.yang@intel.com
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@ -70,7 +70,7 @@ static u32 guc_ctl_debug_flags(struct xe_guc *guc)
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static u32 guc_ctl_feature_flags(struct xe_guc *guc)
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static u32 guc_ctl_feature_flags(struct xe_guc *guc)
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{
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{
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u32 flags = 0;
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u32 flags = GUC_CTL_ENABLE_LITE_RESTORE;
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if (!guc_to_xe(guc)->info.skip_guc_pc)
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if (!guc_to_xe(guc)->info.skip_guc_pc)
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flags |= GUC_CTL_ENABLE_SLPC;
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flags |= GUC_CTL_ENABLE_SLPC;
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@ -105,6 +105,7 @@ struct guc_update_exec_queue_policy {
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#define GUC_CTL_FEATURE 2
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#define GUC_CTL_FEATURE 2
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#define GUC_CTL_ENABLE_SLPC BIT(2)
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#define GUC_CTL_ENABLE_SLPC BIT(2)
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#define GUC_CTL_ENABLE_LITE_RESTORE BIT(4)
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#define GUC_CTL_DISABLE_SCHEDULER BIT(14)
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#define GUC_CTL_DISABLE_SCHEDULER BIT(14)
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#define GUC_CTL_DEBUG 3
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#define GUC_CTL_DEBUG 3
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