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arm64: dts: renesas: r8a779h0: Add CA76 operating points

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Add operating points for running the Cortex-A76 CPU cores on R-Car V4M
at various speeds, up to the Normal (1.0 GHz).

Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/736b5836ec2b54e8b36712866309dc1b7ee1fc48.1706796979.git.geert+renesas@glider.be
This commit is contained in:
Duy Nguyen 2024-02-01 15:19:20 +01:00 committed by Geert Uytterhoeven
parent 4c1fd23a22
commit 6bd8b0bc44
1 changed files with 20 additions and 0 deletions
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20
arch/arm64/boot/dts/renesas/r8a779h0.dtsi
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@ -14,6 +14,22 @@ / {
#address-cells = <2>;
#size-cells = <2>;
cluster0_opp: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <825000>;
clock-latency-ns = <500000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <825000>;
clock-latency-ns = <500000>;
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
@ -44,6 +60,7 @@ a76_0: cpu@0 {
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC0>;
operating-points-v2 = <&cluster0_opp>;
};
a76_1: cpu@100 {
@ -55,6 +72,7 @@ a76_1: cpu@100 {
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC1>;
operating-points-v2 = <&cluster0_opp>;
};
a76_2: cpu@200 {
@ -66,6 +84,7 @@ a76_2: cpu@200 {
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC2>;
operating-points-v2 = <&cluster0_opp>;
};
a76_3: cpu@300 {
@ -77,6 +96,7 @@ a76_3: cpu@300 {
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC3>;
operating-points-v2 = <&cluster0_opp>;
};
idle-states {