mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-08-28 09:22:08 +00:00
arm64: dts: imx8mp-venice-gw74xx: update to revB PCB
Update the imx8mp-venice-gw74xx for revB: - add CAN1 - add TIS-TPM on SPI2 - add FAN controller - fix PMIC I2C bus (revA PMIC I2C was non-functional so no need for backward compatible option) - M2 socket GPIO's moved Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
parent
0f8446f02b
commit
531936b218
@ -125,12 +125,22 @@ reg_usb2_vbus: regulator-usb2 {
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regulator-max-microvolt = <5000000>;
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};
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reg_can1_stby: regulator-can1-stby {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_can1>;
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regulator-name = "can1_stby";
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gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_can2_stby: regulator-can2-stby {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_can>;
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pinctrl-0 = <&pinctrl_reg_can2>;
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regulator-name = "can2_stby";
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gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
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gpio = <&gpio5 5 GPIO_ACTIVE_LOW>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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@ -164,6 +174,21 @@ &A53_3 {
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cpu-supply = <®_arm>;
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1>;
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cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
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status = "okay";
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tpm@0 {
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compatible = "tcg,tpm_tis-spi";
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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reg = <0x0>;
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spi-max-frequency = <36000000>;
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};
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};
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/* off-board header */
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&ecspi2 {
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pinctrl-names = "default";
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@ -204,6 +229,13 @@ fixed-link {
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};
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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xceiver-supply = <®_can1_stby>;
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status = "okay";
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};
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&flexcan2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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@ -214,38 +246,38 @@ &flexcan2 {
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&gpio1 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "dio0", "", "dio1", "", "", "",
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"", "dio0", "", "dio1", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&gpio2 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "pcie3_wdis#", "",
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"", "", "", "", "", "", "m2_pin20", "",
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"", "", "", "", "", "pcie1_wdis#", "pcie3_wdis#", "",
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"", "", "pcie2_wdis#", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&gpio3 {
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gpio-line-names =
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"m2_gdis#", "", "", "", "", "", "", "m2_rst#",
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"", "", "", "", "", "", "m2_rst", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"m2_off#", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&gpio4 {
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gpio-line-names =
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"", "", "m2_off#", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "m2_wdis#", "", "", "",
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"", "", "", "", "", "", "", "uart_rs485";
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"", "", "m2_wdis#", "", "", "", "", "",
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"", "", "", "", "", "", "", "rs485_en";
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};
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&gpio5 {
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gpio-line-names =
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"uart_half", "uart_term", "", "", "", "", "", "",
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"rs485_hd", "rs485_term", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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@ -268,6 +300,8 @@ gsc: gsc@20 {
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interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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adc {
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compatible = "gw,gsc-adc";
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@ -286,6 +320,12 @@ channel@8 {
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label = "vdd_bat";
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};
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channel@16 {
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gw,mode = <4>;
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reg = <0x16>;
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label = "fan_tach";
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};
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channel@82 {
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gw,mode = <2>;
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reg = <0x82>;
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@ -358,6 +398,11 @@ channel@a2 {
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gw,voltage-divider-ohms = <10000 10000>;
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};
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};
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fan-controller@a {
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compatible = "gw,gsc-fan";
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reg = <0x0a>;
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};
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};
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gpio: gpio@23 {
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@ -369,85 +414,6 @@ gpio: gpio@23 {
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interrupts = <4>;
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};
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pmic@25 {
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compatible = "nxp,pca9450c";
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reg = <0x25>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio3>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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regulators {
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BUCK1 {
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regulator-name = "BUCK1";
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regulator-min-microvolt = <720000>;
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regulator-max-microvolt = <1000000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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reg_arm: BUCK2 {
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regulator-name = "BUCK2";
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regulator-min-microvolt = <720000>;
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regulator-max-microvolt = <1025000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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nxp,dvs-run-voltage = <950000>;
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nxp,dvs-standby-voltage = <850000>;
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};
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BUCK4 {
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regulator-name = "BUCK4";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3600000>;
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regulator-boot-on;
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regulator-always-on;
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};
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BUCK5 {
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regulator-name = "BUCK5";
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regulator-min-microvolt = <1650000>;
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regulator-max-microvolt = <1950000>;
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regulator-boot-on;
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regulator-always-on;
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};
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BUCK6 {
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regulator-name = "BUCK6";
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regulator-min-microvolt = <1045000>;
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regulator-max-microvolt = <1155000>;
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regulator-boot-on;
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regulator-always-on;
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};
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LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <1650000>;
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regulator-max-microvolt = <1950000>;
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regulator-boot-on;
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regulator-always-on;
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};
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LDO3 {
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regulator-name = "LDO3";
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regulator-min-microvolt = <1710000>;
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regulator-max-microvolt = <1890000>;
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regulator-boot-on;
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regulator-always-on;
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};
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LDO5 {
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regulator-name = "LDO5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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eeprom@50 {
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compatible = "atmel,24c02";
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reg = <0x50>;
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@ -559,7 +525,6 @@ fixed-link {
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};
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};
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/* off-board header */
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&i2c3 {
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clock-frequency = <400000>;
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pinctrl-names = "default", "gpio";
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@ -568,6 +533,85 @@ &i2c3 {
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scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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pmic@25 {
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compatible = "nxp,pca9450c";
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reg = <0x25>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio3>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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regulators {
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BUCK1 {
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regulator-name = "BUCK1";
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regulator-min-microvolt = <720000>;
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regulator-max-microvolt = <1000000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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reg_arm: BUCK2 {
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regulator-name = "BUCK2";
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regulator-min-microvolt = <720000>;
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regulator-max-microvolt = <1025000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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nxp,dvs-run-voltage = <950000>;
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nxp,dvs-standby-voltage = <850000>;
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};
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BUCK4 {
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regulator-name = "BUCK4";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3600000>;
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regulator-boot-on;
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regulator-always-on;
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};
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BUCK5 {
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regulator-name = "BUCK5";
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regulator-min-microvolt = <1650000>;
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regulator-max-microvolt = <1950000>;
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regulator-boot-on;
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regulator-always-on;
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};
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BUCK6 {
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regulator-name = "BUCK6";
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regulator-min-microvolt = <1045000>;
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regulator-max-microvolt = <1155000>;
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regulator-boot-on;
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regulator-always-on;
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};
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LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <1650000>;
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regulator-max-microvolt = <1950000>;
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regulator-boot-on;
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regulator-always-on;
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};
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LDO3 {
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regulator-name = "LDO3";
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regulator-min-microvolt = <1710000>;
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regulator-max-microvolt = <1890000>;
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regulator-boot-on;
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regulator-always-on;
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};
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LDO5 {
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regulator-name = "LDO5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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};
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/* off-board header */
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@ -726,12 +770,14 @@ pinctrl_hog: hoggrp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 0x40000040 /* DIO0 */
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MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x40000040 /* DIO1 */
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MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x40000040 /* M2SKT_OFF# */
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MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18 0x40000150 /* PCIE2_WDIS# */
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MX8MP_IOMUXC_SD2_CMD__GPIO2_IO14 0x40000150 /* PCIE3_WDIS# */
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MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06 0x40000040 /* M2SKT_RST# */
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MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x40000040 /* M2SKT_OFF# */
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MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x40000150 /* M2SKT_WDIS# */
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MX8MP_IOMUXC_NAND_ALE__GPIO3_IO00 0x40000150 /* M2SKT_GDIS# */
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MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40000040 /* M2SKT_PIN20 */
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MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11 0x40000040 /* M2SKT_PIN22 */
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MX8MP_IOMUXC_SD2_CLK__GPIO2_IO13 0x40000150 /* PCIE1_WDIS# */
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MX8MP_IOMUXC_SD2_CMD__GPIO2_IO14 0x40000150 /* PCIE3_WDIS# */
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MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18 0x40000150 /* PCIE2_WDIS# */
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MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06 0x40000040 /* M2SKT_RST# */
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MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x40000104 /* UART_TERM */
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MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31 0x40000104 /* UART_RS485 */
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MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00 0x40000104 /* UART_HALF */
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@ -784,6 +830,13 @@ MX8MP_IOMUXC_SAI1_RXC__ENET1_1588_EVENT0_OUT 0x140
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
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MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX 0x154
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@ -869,7 +922,7 @@ MX8MP_IOMUXC_SD2_DATA1__GPIO2_IO16 0x10
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pinctrl_pcie0: pciegrp {
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fsl,pins = <
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MX8MP_IOMUXC_SD2_DATA2__GPIO2_IO17 0x110
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MX8MP_IOMUXC_SD2_DATA2__GPIO2_IO17 0x106
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>;
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};
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@ -885,12 +938,18 @@ MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x140
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>;
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};
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pinctrl_reg_can: regcangrp {
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pinctrl_reg_can1: regcan1grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19 0x154
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>;
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};
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pinctrl_reg_can2: regcan2grp {
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fsl,pins = <
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MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05 0x154
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>;
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};
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pinctrl_reg_usb2: regusb2grp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x140
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@ -903,12 +962,12 @@ MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09 0x110
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>;
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};
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pinctrl_sai2: sai2grp {
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pinctrl_spi1: spi1grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC 0xd6
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MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6
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MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK 0xd6
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MX8MP_IOMUXC_SAI2_MCLK__AUDIOMIX_SAI2_MCLK 0xd6
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MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x82
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MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x82
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MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x82
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MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x140
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>;
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};
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