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drm/xe: Move defines before relevant fields
Align on same rule in the whole file: defines then doc then relevant field, with an empty line to separate fields. v2: - Rebase on drm-xe-next - Fix ordering of defines and fields in uAPI (Lucas De Marchi) v3: Remove useless empty lines (Lucas De Marchi) v4: Move changelog to commit v5: Rebase Reported-by: Oded Gabbay <ogabbay@kernel.org> Link: https://lists.freedesktop.org/archives/intel-xe/2023-May/004704.html Signed-off-by: Francois Dugast <francois.dugast@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Francois Dugast
Rodrigo Vivi
parent
ffd6620fb7
commit
4f082f2c3a
@ -60,6 +60,7 @@ struct xe_user_extension {
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* Pointer to the next struct xe_user_extension, or zero if the end.
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*/
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__u64 next_extension;
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/**
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* @name: Name of the extension.
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*
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@ -70,6 +71,7 @@ struct xe_user_extension {
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* of uAPI which has embedded the struct xe_user_extension.
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*/
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__u32 name;
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/**
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* @pad: MBZ
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*
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@ -218,11 +220,11 @@ struct drm_xe_query_topology_mask {
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/** @gt_id: GT ID the mask is associated with */
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__u16 gt_id;
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/** @type: type of mask */
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__u16 type;
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#define XE_TOPO_DSS_GEOMETRY (1 << 0)
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#define XE_TOPO_DSS_COMPUTE (1 << 1)
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#define XE_TOPO_EU_PER_DSS (1 << 2)
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/** @type: type of mask */
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__u16 type;
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/** @num_bytes: number of bytes in requested mask */
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__u32 num_bytes;
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@ -270,15 +272,14 @@ struct drm_xe_device_query {
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/** @extensions: Pointer to the first extension struct, if any */
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__u64 extensions;
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/** @query: The type of data to query */
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__u32 query;
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#define DRM_XE_DEVICE_QUERY_ENGINES 0
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#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
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#define DRM_XE_DEVICE_QUERY_CONFIG 2
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#define DRM_XE_DEVICE_QUERY_GTS 3
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#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
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#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
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/** @query: The type of data to query */
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__u32 query;
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/** @size: Size of the queried data */
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__u32 size;
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@ -301,12 +302,12 @@ struct drm_xe_gem_create {
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*/
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__u64 size;
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#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
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#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
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/**
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* @flags: Flags, currently a mask of memory instances of where BO can
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* be placed
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*/
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#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
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#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
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__u32 flags;
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/**
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@ -357,10 +358,13 @@ struct drm_xe_gem_mmap_offset {
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struct drm_xe_vm_bind_op_error_capture {
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/** @error: errno that occured */
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__s32 error;
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/** @op: operation that encounter an error */
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__u32 op;
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/** @addr: address of bind op */
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__u64 addr;
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/** @size: size of bind */
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__u64 size;
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};
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@ -370,8 +374,8 @@ struct drm_xe_ext_vm_set_property {
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/** @base: base user extension */
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struct xe_user_extension base;
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/** @property: property to set */
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#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
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/** @property: property to set */
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__u32 property;
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/** @pad: MBZ */
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@ -385,17 +389,16 @@ struct drm_xe_ext_vm_set_property {
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};
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struct drm_xe_vm_create {
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/** @extensions: Pointer to the first extension struct, if any */
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#define XE_VM_EXTENSION_SET_PROPERTY 0
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/** @extensions: Pointer to the first extension struct, if any */
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__u64 extensions;
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/** @flags: Flags */
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__u32 flags;
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#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
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#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
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#define DRM_XE_VM_CREATE_ASYNC_BIND_OPS (0x1 << 2)
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#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
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/** @flags: Flags */
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__u32 flags;
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/** @vm_id: Returned VM ID */
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__u32 vm_id;
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@ -430,6 +433,7 @@ struct drm_xe_vm_bind_op {
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* ignored for unbind
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*/
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__u64 obj_offset;
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/** @userptr: user pointer to bind on */
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__u64 userptr;
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};
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@ -448,12 +452,6 @@ struct drm_xe_vm_bind_op {
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*/
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__u64 tile_mask;
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/** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits) */
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__u32 op;
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/** @mem_region: Memory region to prefetch VMA to, instance not a mask */
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__u32 region;
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#define XE_VM_BIND_OP_MAP 0x0
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#define XE_VM_BIND_OP_UNMAP 0x1
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#define XE_VM_BIND_OP_MAP_USERPTR 0x2
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@ -500,6 +498,11 @@ struct drm_xe_vm_bind_op {
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* intended to implement VK sparse bindings.
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*/
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#define XE_VM_BIND_FLAG_NULL (0x1 << 19)
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/** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits) */
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__u32 op;
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/** @mem_region: Memory region to prefetch VMA to, instance not a mask */
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__u32 region;
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/** @reserved: Reserved */
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__u64 reserved[2];
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@ -528,6 +531,7 @@ struct drm_xe_vm_bind {
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union {
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/** @bind: used if num_binds == 1 */
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struct drm_xe_vm_bind_op bind;
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/**
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* @vector_of_binds: userptr to array of struct
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* drm_xe_vm_bind_op if num_binds > 1
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@ -575,7 +579,6 @@ struct drm_xe_engine_set_property {
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/** @engine_id: Engine ID */
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__u32 engine_id;
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/** @property: property to set */
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#define XE_ENGINE_SET_PROPERTY_PRIORITY 0
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#define XE_ENGINE_SET_PROPERTY_TIMESLICE 1
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#define XE_ENGINE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
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@ -591,6 +594,7 @@ struct drm_xe_engine_set_property {
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#define XE_ENGINE_SET_PROPERTY_ACC_TRIGGER 6
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#define XE_ENGINE_SET_PROPERTY_ACC_NOTIFY 7
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#define XE_ENGINE_SET_PROPERTY_ACC_GRANULARITY 8
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/** @property: property to set */
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__u32 property;
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/** @value: property value */
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@ -602,8 +606,6 @@ struct drm_xe_engine_set_property {
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/** struct drm_xe_engine_class_instance - instance of an engine class */
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struct drm_xe_engine_class_instance {
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__u16 engine_class;
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#define DRM_XE_ENGINE_CLASS_RENDER 0
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#define DRM_XE_ENGINE_CLASS_COPY 1
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#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
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@ -614,14 +616,15 @@ struct drm_xe_engine_class_instance {
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* creating ordered queues of VM bind operations.
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*/
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#define DRM_XE_ENGINE_CLASS_VM_BIND 5
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__u16 engine_class;
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__u16 engine_instance;
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__u16 gt_id;
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};
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struct drm_xe_engine_create {
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/** @extensions: Pointer to the first extension struct, if any */
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#define XE_ENGINE_EXTENSION_SET_PROPERTY 0
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/** @extensions: Pointer to the first extension struct, if any */
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__u64 extensions;
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/** @width: submission width (number BB per exec) for this engine */
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@ -659,8 +662,8 @@ struct drm_xe_engine_get_property {
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/** @engine_id: Engine ID */
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__u32 engine_id;
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/** @property: property to get */
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#define XE_ENGINE_GET_PROPERTY_BAN 0
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/** @property: property to get */
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__u32 property;
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/** @value: property value */
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@ -685,19 +688,19 @@ struct drm_xe_sync {
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/** @extensions: Pointer to the first extension struct, if any */
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__u64 extensions;
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__u32 flags;
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#define DRM_XE_SYNC_SYNCOBJ 0x0
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#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
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#define DRM_XE_SYNC_DMA_BUF 0x2
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#define DRM_XE_SYNC_USER_FENCE 0x3
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#define DRM_XE_SYNC_SIGNAL 0x10
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__u32 flags;
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/** @pad: MBZ */
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__u32 pad;
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union {
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__u32 handle;
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/**
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* @addr: Address of user fence. When sync passed in via exec
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* IOCTL this a GPU address in the VM. When sync passed in via
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@ -753,8 +756,6 @@ struct drm_xe_mmio {
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__u32 addr;
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__u32 flags;
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#define DRM_XE_MMIO_8BIT 0x0
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#define DRM_XE_MMIO_16BIT 0x1
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#define DRM_XE_MMIO_32BIT 0x2
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@ -762,6 +763,7 @@ struct drm_xe_mmio {
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#define DRM_XE_MMIO_BITS_MASK 0x3
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#define DRM_XE_MMIO_READ 0x4
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#define DRM_XE_MMIO_WRITE 0x8
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__u32 flags;
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__u64 value;
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@ -781,47 +783,57 @@ struct drm_xe_mmio {
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struct drm_xe_wait_user_fence {
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/** @extensions: Pointer to the first extension struct, if any */
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__u64 extensions;
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union {
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/**
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* @addr: user pointer address to wait on, must qword aligned
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*/
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__u64 addr;
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/**
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* @vm_id: The ID of the VM which encounter an error used with
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* DRM_XE_UFENCE_WAIT_VM_ERROR. Upper 32 bits must be clear.
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*/
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__u64 vm_id;
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};
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/** @op: wait operation (type of comparison) */
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#define DRM_XE_UFENCE_WAIT_EQ 0
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#define DRM_XE_UFENCE_WAIT_NEQ 1
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#define DRM_XE_UFENCE_WAIT_GT 2
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#define DRM_XE_UFENCE_WAIT_GTE 3
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#define DRM_XE_UFENCE_WAIT_LT 4
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#define DRM_XE_UFENCE_WAIT_LTE 5
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/** @op: wait operation (type of comparison) */
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__u16 op;
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/** @flags: wait flags */
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#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
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#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
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#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
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/** @flags: wait flags */
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__u16 flags;
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/** @pad: MBZ */
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__u32 pad;
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/** @value: compare value */
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__u64 value;
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/** @mask: comparison mask */
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#define DRM_XE_UFENCE_WAIT_U8 0xffu
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#define DRM_XE_UFENCE_WAIT_U16 0xffffu
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#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
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#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
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/** @mask: comparison mask */
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__u64 mask;
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/** @timeout: how long to wait before bailing, value in jiffies */
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__s64 timeout;
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/**
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* @num_engines: number of engine instances to wait on, must be zero
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* when DRM_XE_UFENCE_WAIT_SOFT_OP set
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*/
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__u64 num_engines;
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/**
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* @instances: user pointer to array of drm_xe_engine_class_instance to
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* wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
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@ -882,7 +894,6 @@ struct drm_xe_vm_madvise {
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#define DRM_XE_VMA_PRIORITY_HIGH 2 /* Must be elevated user */
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/* Pin the VMA in memory, must be elevated user */
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#define DRM_XE_VM_MADVISE_PIN 6
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/** @property: property to set */
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__u32 property;
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