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arm64: dts: qcom: sa8775p: Mark PCIe EP controller as cache coherent

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The PCIe EP controller on SA8775P supports cache coherency, hence add
the "dma-coherent" property to mark it as such.

Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1710166298-27144-4-git-send-email-quic_msarkar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Mrinmay Sarkar 2024-03-11 19:41:37 +05:30 committed by Bjorn Andersson
parent bfc10ebd76
commit 4b220c6fa9
1 changed files with 1 additions and 0 deletions
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arch/arm64/boot/dts/qcom/sa8775p.dtsi
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@ -4649,6 +4649,7 @@ pcie0_ep: pcie-ep@1c00000 {
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>;
interconnect-names = "pcie-mem", "cpu-pcie";
dma-coherent;
iommus = <&pcie_smmu 0x0000 0x7f>;
resets = <&gcc GCC_PCIE_0_BCR>;
reset-names = "core";