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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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arm64: dts: ti: k3-am62a-main: Add more peripheral nodes
Add DT nodes for main domain SPI, PWM, DMA, CPSW (ethernet), mailbox, spinlock, USB and CAN. Co-developed-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230103042110.1092122-3-vigneshr@ti.com
This commit is contained in:
Vignesh Raghavendra
parent
eaee246b5e
commit
3dad70def7
@ -48,6 +48,18 @@ main_conf: syscon@100000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00 0x00 0x00100000 0x20000>;
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phy_gmii_sel: phy@4044 {
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compatible = "ti,am654-phy-gmii-sel";
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reg = <0x4044 0x8>;
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#phy-cells = <1>;
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};
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epwm_tbclk: clock-controller@4130 {
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compatible = "ti,am62-epwm-tbclk", "syscon";
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reg = <0x4130 0x4>;
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#clock-cells = <1>;
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};
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};
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dmss: bus@48000000 {
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@ -69,6 +81,67 @@ secure_proxy_main: mailbox@4d000000 {
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interrupt-names = "rx_012";
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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};
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inta_main_dmss: interrupt-controller@48000000 {
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compatible = "ti,sci-inta";
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reg = <0x00 0x48000000 0x00 0x100000>;
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#interrupt-cells = <0>;
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interrupt-controller;
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interrupt-parent = <&gic500>;
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msi-controller;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <28>;
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ti,interrupt-ranges = <6 70 34>;
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ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
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};
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main_bcdma: dma-controller@485c0100 {
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compatible = "ti,am64-dmss-bcdma";
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reg = <0x00 0x485c0100 0x00 0x100>,
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<0x00 0x4c000000 0x00 0x20000>,
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<0x00 0x4a820000 0x00 0x20000>,
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<0x00 0x4aa40000 0x00 0x20000>,
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<0x00 0x4bc00000 0x00 0x100000>;
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reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
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msi-parent = <&inta_main_dmss>;
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#dma-cells = <3>;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <26>;
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ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
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ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
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ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
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};
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main_pktdma: dma-controller@485c0000 {
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compatible = "ti,am64-dmss-pktdma";
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reg = <0x00 0x485c0000 0x00 0x100>,
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<0x00 0x4a800000 0x00 0x20000>,
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<0x00 0x4aa00000 0x00 0x40000>,
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<0x00 0x4b800000 0x00 0x400000>;
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reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
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msi-parent = <&inta_main_dmss>;
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#dma-cells = <2>;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <30>;
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ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
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<0x24>, /* CPSW_TX_CHAN */
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<0x25>, /* SAUL_TX_0_CHAN */
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<0x26>; /* SAUL_TX_1_CHAN */
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ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
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<0x11>, /* RING_CPSW_TX_CHAN */
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<0x12>, /* RING_SAUL_TX_0_CHAN */
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<0x13>; /* RING_SAUL_TX_1_CHAN */
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ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
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<0x2b>, /* CPSW_RX_CHAN */
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<0x2d>, /* SAUL_RX_0_CHAN */
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<0x2f>, /* SAUL_RX_1_CHAN */
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<0x31>, /* SAUL_RX_2_CHAN */
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<0x33>; /* SAUL_RX_3_CHAN */
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ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
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<0x2c>, /* FLOW_CPSW_RX_CHAN */
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<0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
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<0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
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};
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};
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dmsc: system-controller@44043000 {
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@ -222,6 +295,39 @@ main_i2c3: i2c@20030000 {
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status = "disabled";
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};
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main_spi0: spi@20100000 {
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compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
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reg = <0x00 0x20100000 0x00 0x400>;
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interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 141 0>;
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status = "disabled";
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};
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main_spi1: spi@20110000 {
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compatible = "ti,am654-mcspi","ti,omap4-mcspi";
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reg = <0x00 0x20110000 0x00 0x400>;
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interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 142 0>;
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status = "disabled";
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};
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main_spi2: spi@20120000 {
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compatible = "ti,am654-mcspi","ti,omap4-mcspi";
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reg = <0x00 0x20120000 0x00 0x400>;
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 143 0>;
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status = "disabled";
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};
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main_gpio_intr: interrupt-controller@a00000 {
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compatible = "ti,sci-intr";
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reg = <0x00 0x00a00000 0x00 0x800>;
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@ -295,4 +401,263 @@ sdhci1: mmc@fa00000 {
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no-1-8-v;
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status = "disabled";
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};
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usbss0: dwc3-usb@f900000 {
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compatible = "ti,am62-usb";
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reg = <0x00 0x0f900000 0x00 0x800>;
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clocks = <&k3_clks 161 3>;
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clock-names = "ref";
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ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
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#address-cells = <2>;
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#size-cells = <2>;
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power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
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ranges;
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status = "disabled";
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usb0: usb@31000000 {
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compatible = "snps,dwc3";
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reg =<0x00 0x31000000 0x00 0x50000>;
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interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
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<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
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interrupt-names = "host", "peripheral";
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maximum-speed = "high-speed";
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dr_mode = "otg";
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};
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};
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usbss1: dwc3-usb@f910000 {
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compatible = "ti,am62-usb";
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reg = <0x00 0x0f910000 0x00 0x800>;
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clocks = <&k3_clks 162 3>;
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clock-names = "ref";
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ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
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#address-cells = <2>;
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#size-cells = <2>;
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power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
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ranges;
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status = "disabled";
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usb1: usb@31100000 {
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compatible = "snps,dwc3";
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reg =<0x00 0x31100000 0x00 0x50000>;
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interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
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<GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
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interrupt-names = "host", "peripheral";
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maximum-speed = "high-speed";
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dr_mode = "otg";
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};
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};
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fss: bus@fc00000 {
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compatible = "simple-bus";
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reg = <0x00 0x0fc00000 0x00 0x70000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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status = "disabled";
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ospi0: spi@fc40000 {
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compatible = "ti,am654-ospi", "cdns,qspi-nor";
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reg = <0x00 0x0fc40000 0x00 0x100>,
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<0x05 0x00000000 0x01 0x00000000>;
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interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
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cdns,fifo-depth = <256>;
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cdns,fifo-width = <4>;
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cdns,trigger-address = <0x0>;
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clocks = <&k3_clks 75 7>;
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assigned-clocks = <&k3_clks 75 7>;
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assigned-clock-parents = <&k3_clks 75 8>;
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assigned-clock-rates = <166666666>;
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power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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cpsw3g: ethernet@8000000 {
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compatible = "ti,am642-cpsw-nuss";
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#address-cells = <2>;
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#size-cells = <2>;
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reg = <0x0 0x8000000 0x0 0x200000>;
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reg-names = "cpsw_nuss";
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ranges = <0x0 0x0 0x0 0x8000000 0x0 0x200000>;
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clocks = <&k3_clks 13 0>;
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assigned-clocks = <&k3_clks 13 3>;
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assigned-clock-parents = <&k3_clks 13 11>;
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clock-names = "fck";
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power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
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status = "disabled";
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dmas = <&main_pktdma 0xc600 15>,
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<&main_pktdma 0xc601 15>,
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<&main_pktdma 0xc602 15>,
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<&main_pktdma 0xc603 15>,
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<&main_pktdma 0xc604 15>,
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<&main_pktdma 0xc605 15>,
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<&main_pktdma 0xc606 15>,
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<&main_pktdma 0xc607 15>,
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<&main_pktdma 0x4600 15>;
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dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
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"tx7", "rx";
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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cpsw_port1: port@1 {
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reg = <1>;
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ti,mac-only;
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label = "port1";
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phys = <&phy_gmii_sel 1>;
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mac-address = [00 00 00 00 00 00];
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ti,syscon-efuse = <&wkup_conf 0x200>;
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};
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cpsw_port2: port@2 {
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reg = <2>;
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ti,mac-only;
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label = "port2";
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phys = <&phy_gmii_sel 2>;
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mac-address = [00 00 00 00 00 00];
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};
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};
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cpsw3g_mdio: mdio@f00 {
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compatible = "ti,cpsw-mdio","ti,davinci_mdio";
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reg = <0x0 0xf00 0x0 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&k3_clks 13 0>;
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clock-names = "fck";
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bus_freq = <1000000>;
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};
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cpts@3d000 {
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compatible = "ti,j721e-cpts";
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reg = <0x0 0x3d000 0x0 0x400>;
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clocks = <&k3_clks 13 3>;
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clock-names = "cpts";
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interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "cpts";
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ti,cpts-ext-ts-inputs = <4>;
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ti,cpts-periodic-outputs = <2>;
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};
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};
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hwspinlock: spinlock@2a000000 {
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compatible = "ti,am64-hwspinlock";
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reg = <0x00 0x2a000000 0x00 0x1000>;
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#hwlock-cells = <1>;
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};
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mailbox0_cluster0: mailbox@29000000 {
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compatible = "ti,am64-mailbox";
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reg = <0x00 0x29000000 0x00 0x200>;
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <16>;
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};
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mailbox0_cluster1: mailbox@29010000 {
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compatible = "ti,am64-mailbox";
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reg = <0x00 0x29010000 0x00 0x200>;
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <16>;
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};
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mailbox0_cluster2: mailbox@29020000 {
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compatible = "ti,am64-mailbox";
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reg = <0x00 0x29020000 0x00 0x200>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <16>;
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};
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mailbox0_cluster3: mailbox@29030000 {
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compatible = "ti,am64-mailbox";
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reg = <0x00 0x29030000 0x00 0x200>;
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interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <16>;
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};
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main_mcan0: can@20701000 {
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compatible = "bosch,m_can";
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reg = <0x00 0x20701000 0x00 0x200>,
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<0x00 0x20708000 0x00 0x8000>;
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reg-names = "m_can", "message_ram";
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power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
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clock-names = "hclk", "cclk";
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interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "int0", "int1";
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bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
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status = "disabled";
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};
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epwm0: pwm@23000000 {
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compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x00 0x23000000 0x00 0x100>;
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power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
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clock-names = "tbclk", "fck";
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status = "disabled";
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};
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epwm1: pwm@23010000 {
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compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x00 0x23010000 0x00 0x100>;
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power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
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clock-names = "tbclk", "fck";
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status = "disabled";
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};
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epwm2: pwm@23020000 {
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compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x00 0x23020000 0x00 0x100>;
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power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
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clock-names = "tbclk", "fck";
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status = "disabled";
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};
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ecap0: pwm@23100000 {
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compatible = "ti,am3352-ecap";
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#pwm-cells = <3>;
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reg = <0x00 0x23100000 0x00 0x100>;
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power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 51 0>;
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clock-names = "fck";
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status = "disabled";
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};
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ecap1: pwm@23110000 {
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compatible = "ti,am3352-ecap";
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#pwm-cells = <3>;
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reg = <0x00 0x23110000 0x00 0x100>;
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power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 52 0>;
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clock-names = "fck";
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status = "disabled";
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};
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ecap2: pwm@23120000 {
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compatible = "ti,am3352-ecap";
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#pwm-cells = <3>;
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reg = <0x00 0x23120000 0x00 0x100>;
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power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 53 0>;
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clock-names = "fck";
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status = "disabled";
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};
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};
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