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arm64: tegra: Bump #address-cells and #size-cells

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The #address-cells and #size-cells properties for the top-level bus were
set to 1 because that was enough to represent the register ranges of all
the IP blocks on that bus. However, most of these devices can do DMA to
a larger address space, so translation of DMA addresses needs to happen
in a 64-bit address space.

Partially this was already done by the memory controller increasing that
address space by setting #address-cells and #size-cells to 2, but a full
DMA address translation would still cause truncation when traversing to
the top-level bus.

Fix this by setting #address-cells = <2> and #size-cells = <2> on the
top-level bus and adjusting all "reg" and "ranges" properties of its
children.

While at it, also move the PCI and GPU nodes back under the top-level
bus where they belong. The were put outside of it to work around this
same problem.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2022-11-17 09:38:34 +01:00
parent c71e18973b
commit 2838cfddbc
5 changed files with 1681 additions and 1673 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

84
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
View File

@ -2184,67 +2184,67 @@ sor@15b80000 {
GPIO_ACTIVE_LOW>; GPIO_ACTIVE_LOW>;
}; };
}; };
};
pcie@14100000 { pcie@14100000 {
status = "okay"; status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>; vddio-pex-ctl-supply = <&vdd_1v8ao>;
phys = <&p2u_hsio_0>; phys = <&p2u_hsio_0>;
phy-names = "p2u-0"; phy-names = "p2u-0";
}; };
pcie@14140000 { pcie@14140000 {
status = "okay"; status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>; vddio-pex-ctl-supply = <&vdd_1v8ao>;
phys = <&p2u_hsio_7>; phys = <&p2u_hsio_7>;
phy-names = "p2u-0"; phy-names = "p2u-0";
}; };
pcie@14180000 { pcie@14180000 {
status = "okay"; status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>; vddio-pex-ctl-supply = <&vdd_1v8ao>;
phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>, phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>,
<&p2u_hsio_5>; <&p2u_hsio_5>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3"; phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
}; };
pcie@141a0000 { pcie@141a0000 {
status = "okay"; status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>; vddio-pex-ctl-supply = <&vdd_1v8ao>;
vpcie3v3-supply = <&vdd_3v3_pcie>; vpcie3v3-supply = <&vdd_3v3_pcie>;
vpcie12v-supply = <&vdd_12v_pcie>; vpcie12v-supply = <&vdd_12v_pcie>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>; <&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7"; "p2u-5", "p2u-6", "p2u-7";
}; };
pcie-ep@141a0000 { pcie-ep@141a0000 {
status = "disabled"; status = "disabled";
vddio-pex-ctl-supply = <&vdd_1v8ao>; vddio-pex-ctl-supply = <&vdd_1v8ao>;
reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>; reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5) nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
GPIO_ACTIVE_HIGH>; GPIO_ACTIVE_HIGH>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>; <&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7"; "p2u-5", "p2u-6", "p2u-7";
};
}; };
fan: pwm-fan { fan: pwm-fan {

54
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi
View File

@ -2209,46 +2209,46 @@ sor@15b40000 {
GPIO_ACTIVE_LOW>; GPIO_ACTIVE_LOW>;
}; };
}; };
};
pcie@14160000 { pcie@14160000 {
status = "okay"; status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>; vddio-pex-ctl-supply = <&vdd_1v8ao>;
phys = <&p2u_hsio_11>; phys = <&p2u_hsio_11>;
phy-names = "p2u-0"; phy-names = "p2u-0";
}; };
pcie@141a0000 { pcie@141a0000 {
status = "okay"; status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>; vddio-pex-ctl-supply = <&vdd_1v8ao>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>; <&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7"; "p2u-5", "p2u-6", "p2u-7";
}; };
pcie-ep@141a0000 { pcie-ep@141a0000 {
status = "disabled"; status = "disabled";
vddio-pex-ctl-supply = <&vdd_1v8ao>; vddio-pex-ctl-supply = <&vdd_1v8ao>;
reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>; reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5) nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
GPIO_ACTIVE_HIGH>; GPIO_ACTIVE_HIGH>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>; <&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7"; "p2u-5", "p2u-6", "p2u-7";
};
}; };
fan: pwm-fan { fan: pwm-fan {

1270
arch/arm64/boot/dts/nvidia/tegra194.dtsi
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File diff suppressed because it is too large Load Diff

102
arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
View File

@ -2048,6 +2048,57 @@ mgbe0_phy: phy@0 {
}; };
}; };
}; };
pcie@14100000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
phys = <&p2u_hsio_3>;
phy-names = "p2u-0";
};
pcie@14160000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>,
<&p2u_hsio_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
};
pcie@141a0000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
vpcie3v3-supply = <&vdd_3v3_pcie>;
vpcie12v-supply = <&vdd_12v_pcie>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
pcie-ep@141a0000 {
status = "disabled";
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
reset-gpios = <&gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW>;
nvidia,refclk-select-gpios = <&gpio_aon
TEGRA234_AON_GPIO(AA, 4)
GPIO_ACTIVE_HIGH>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
}; };
gpio-keys { gpio-keys {
@ -2145,57 +2196,6 @@ sound {
label = "NVIDIA Jetson AGX Orin APE"; label = "NVIDIA Jetson AGX Orin APE";
}; };
pcie@14100000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
phys = <&p2u_hsio_3>;
phy-names = "p2u-0";
};
pcie@14160000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>,
<&p2u_hsio_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
};
pcie@141a0000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
vpcie3v3-supply = <&vdd_3v3_pcie>;
vpcie12v-supply = <&vdd_12v_pcie>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
pcie-ep@141a0000 {
status = "disabled";
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
reset-gpios = <&gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW>;
nvidia,refclk-select-gpios = <&gpio_aon
TEGRA234_AON_GPIO(AA, 4)
GPIO_ACTIVE_HIGH>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
pwm-fan { pwm-fan {
compatible = "pwm-fan"; compatible = "pwm-fan";
pwms = <&pwm3 0 45334>; pwms = <&pwm3 0 45334>;

1844
arch/arm64/boot/dts/nvidia/tegra234.dtsi
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