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dt-bindings: soc/microchip: update syscontroller compatibles

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The Polarfire SoC is currently using two different compatible string
prefixes. Fix this by changing "polarfire-soc-*" strings to "mpfs-*" in
its system controller in order to match the compatible string used in
the soc binding and device tree

Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Conor Dooley 2022-02-14 13:58:31 +00:00 committed by Palmer Dabbelt
parent 2145bb687e
commit 2135562355
No known key found for this signature in database
GPG Key ID: EF4CA1502CCBAB41
2 changed files with 6 additions and 6 deletions
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6
Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml → Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2 %YAML 1.2
--- ---
$id: "http://devicetree.org/schemas/mailbox/microchip,polarfire-soc-mailbox.yaml#" $id: "http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller
@ -11,7 +11,7 @@ maintainers:
properties: properties:
compatible: compatible:
const: microchip,polarfire-soc-mailbox const: microchip,mpfs-mailbox
reg: reg:
items: items:
@ -38,7 +38,7 @@ examples:
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
mbox: mailbox@37020000 { mbox: mailbox@37020000 {
compatible = "microchip,polarfire-soc-mailbox"; compatible = "microchip,mpfs-mailbox";
reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>; reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>;
interrupt-parent = <&L1>; interrupt-parent = <&L1>;
interrupts = <96>; interrupts = <96>;

6
Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml → Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2 %YAML 1.2
--- ---
$id: "http://devicetree.org/schemas/soc/microchip/microchip,polarfire-soc-sys-controller.yaml#" $id: "http://devicetree.org/schemas/soc/microchip/microchip,mpfs-sys-controller.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) system controller title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) system controller
@ -19,7 +19,7 @@ properties:
maxItems: 1 maxItems: 1
compatible: compatible:
const: microchip,polarfire-soc-sys-controller const: microchip,mpfs-sys-controller
required: required:
- compatible - compatible
@ -30,6 +30,6 @@ additionalProperties: false
examples: examples:
- | - |
syscontroller: syscontroller { syscontroller: syscontroller {
compatible = "microchip,polarfire-soc-sys-controller"; compatible = "microchip,mpfs-sys-controller";
mboxes = <&mbox 0>; mboxes = <&mbox 0>;
}; };