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media: chips-media: wave5: support decoding HEVC Main10 profile

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Add support for decoding HEVC Main10 profile by scaling the FBC
buffer stride and size by a factor of (bitdepth / 8).

Signed-off-by: Ivan Bornyakov <brnkv.i1@gmail.com>
Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
This commit is contained in:
Ivan Bornyakov 2024-04-15 13:07:19 +03:00 committed by Hans Verkuil
parent a8fb5fce7a
commit 143e7ab4d9
2 changed files with 18 additions and 13 deletions
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30
drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c
View File

@ -1055,6 +1055,22 @@ static int wave5_prepare_fb(struct vpu_instance *inst)
int ret, i; int ret, i;
struct v4l2_m2m_buffer *buf, *n; struct v4l2_m2m_buffer *buf, *n;
struct v4l2_m2m_ctx *m2m_ctx = inst->v4l2_fh.m2m_ctx; struct v4l2_m2m_ctx *m2m_ctx = inst->v4l2_fh.m2m_ctx;
u32 bitdepth = inst->codec_info->dec_info.initial_info.luma_bitdepth;
switch (bitdepth) {
case 8:
break;
case 10:
if (inst->std == W_HEVC_DEC &&
inst->dev->attr.support_hevc10bit_dec)
break;
fallthrough;
default:
dev_err(inst->dev->dev, "no support for %d bit depth\n", bitdepth);
return -EINVAL;
}
linear_num = v4l2_m2m_num_dst_bufs_ready(m2m_ctx); linear_num = v4l2_m2m_num_dst_bufs_ready(m2m_ctx);
non_linear_num = inst->fbc_buf_count; non_linear_num = inst->fbc_buf_count;
@ -1063,7 +1079,7 @@ static int wave5_prepare_fb(struct vpu_instance *inst)
struct frame_buffer *frame = &inst->frame_buf[i]; struct frame_buffer *frame = &inst->frame_buf[i];
struct vpu_buf *vframe = &inst->frame_vbuf[i]; struct vpu_buf *vframe = &inst->frame_vbuf[i];
fb_stride = inst->dst_fmt.width; fb_stride = ALIGN(inst->dst_fmt.width * bitdepth / 8, 32);
fb_height = ALIGN(inst->dst_fmt.height, 32); fb_height = ALIGN(inst->dst_fmt.height, 32);
luma_size = fb_stride * fb_height; luma_size = fb_stride * fb_height;
@ -1408,22 +1424,10 @@ static int wave5_vpu_dec_start_streaming(struct vb2_queue *q, unsigned int count
if (ret) if (ret)
goto free_bitstream_vbuf; goto free_bitstream_vbuf;
} else if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { } else if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
struct dec_initial_info *initial_info =
&inst->codec_info->dec_info.initial_info;
if (inst->state == VPU_INST_STATE_STOP) if (inst->state == VPU_INST_STATE_STOP)
ret = switch_state(inst, VPU_INST_STATE_INIT_SEQ); ret = switch_state(inst, VPU_INST_STATE_INIT_SEQ);
if (ret) if (ret)
goto return_buffers; goto return_buffers;
if (inst->state == VPU_INST_STATE_INIT_SEQ) {
if (initial_info->luma_bitdepth != 8) {
dev_info(inst->dev->dev, "%s: no support for %d bit depth",
__func__, initial_info->luma_bitdepth);
ret = -EINVAL;
goto return_buffers;
}
}
} }
return ret; return ret;

1
drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
View File

@ -327,6 +327,7 @@ struct vpu_attr {
u32 support_backbone: 1; u32 support_backbone: 1;
u32 support_avc10bit_enc: 1; u32 support_avc10bit_enc: 1;
u32 support_hevc10bit_enc: 1; u32 support_hevc10bit_enc: 1;
u32 support_hevc10bit_dec: 1;
u32 support_vcore_backbone: 1; u32 support_vcore_backbone: 1;
u32 support_vcpu_backbone: 1; u32 support_vcpu_backbone: 1;
}; };