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dt-bindings: PCI: microchip,pcie-host: Allow dma-noncoherent

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PolarFire SoC may be configured in a way that requires non-coherent DMA
handling. On RISC-V, buses are coherent by default & the dma-noncoherent
property is required to denote buses or devices that are non-coherent.

Link: https://lore.kernel.org/r/20241011140043.1250030-4-daire.mcnamara@microchip.com
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Conor Dooley 2024-10-11 15:00:43 +01:00 committed by Bjorn Helgaas
parent 1390a33b3d
commit 04aa999eb9
1 changed files with 2 additions and 0 deletions
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Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
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@ -50,6 +50,8 @@ properties:
items:
pattern: '^fic[0-3]$'
dma-coherent: true
ranges:
minItems: 1
maxItems: 3