mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-02 16:44:59 +00:00
arm64: dts: qcom: x1e001de-devkit: Enable external DP support
The Qualcomm Snapdragon X Elite Devkit for Windows has the same configuration as the CRD variant i.e. all 3 of the type C ports support external DP altmode. Add all the nodes needed to enable them. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Link: https://lore.kernel.org/r/20241025123551.3528206-4-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Sibi Sankar
Bjorn Andersson
parent
3844a8682e
commit
019e1ee32f
@ -82,7 +82,15 @@ port@1 {
|
||||
reg = <1>;
|
||||
|
||||
pmic_glink_ss0_ss_in: endpoint {
|
||||
remote-endpoint = <&usb_1_ss0_qmpphy_out>;
|
||||
remote-endpoint = <&retimer_ss0_ss_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
pmic_glink_ss0_con_sbu_in: endpoint {
|
||||
remote-endpoint = <&retimer_ss0_con_sbu_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -111,7 +119,15 @@ port@1 {
|
||||
reg = <1>;
|
||||
|
||||
pmic_glink_ss1_ss_in: endpoint {
|
||||
remote-endpoint = <&usb_1_ss1_qmpphy_out>;
|
||||
remote-endpoint = <&retimer_ss1_ss_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
pmic_glink_ss1_con_sbu_in: endpoint {
|
||||
remote-endpoint = <&retimer_ss1_con_sbu_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -140,7 +156,15 @@ port@1 {
|
||||
reg = <1>;
|
||||
|
||||
pmic_glink_ss2_ss_in: endpoint {
|
||||
remote-endpoint = <&usb_1_ss2_qmpphy_out>;
|
||||
remote-endpoint = <&retimer_ss2_ss_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
pmic_glink_ss2_con_sbu_in: endpoint {
|
||||
remote-endpoint = <&retimer_ss2_con_sbu_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -213,6 +237,150 @@ vreg_nvme: regulator-nvme {
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "VREG_RTMR0_1P15";
|
||||
regulator-min-microvolt = <1150000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
|
||||
gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
|
||||
pinctrl-0 = <&usb0_pwr_1p15_en>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vreg_rtmr0_1p8: regulator-rtmr0-1p8 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "VREG_RTMR0_1P8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
|
||||
pinctrl-0 = <&usb0_1p8_reg_en>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vreg_rtmr0_3p3: regulator-rtmr0-3p3 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "VREG_RTMR0_3P3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
|
||||
pinctrl-0 = <&usb0_3p3_reg_en>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vreg_rtmr1_1p15: regulator-rtmr1-1p15 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "VREG_RTMR1_1P15";
|
||||
regulator-min-microvolt = <1150000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
|
||||
gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
|
||||
pinctrl-0 = <&rtmr1_1p15_reg_en>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vreg_rtmr1_1p8: regulator-rtmr1-1p8 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "VREG_RTMR1_1P8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
|
||||
pinctrl-0 = <&rtmr1_1p8_reg_en>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vreg_rtmr1_3p3: regulator-rtmr1-3p3 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "VREG_RTMR1_3P3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
|
||||
pinctrl-0 = <&rtmr1_3p3_reg_en>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vreg_rtmr2_1p15: regulator-rtmr2-1p15 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "VREG_RTMR2_1P15";
|
||||
regulator-min-microvolt = <1150000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
|
||||
gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
|
||||
pinctrl-0 = <&rtmr2_1p15_reg_en>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vreg_rtmr2_1p8: regulator-rtmr2-1p8 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "VREG_RTMR2_1P8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
|
||||
pinctrl-0 = <&rtmr2_1p8_reg_en>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vreg_rtmr2_3p3: regulator-rtmr2-3p3 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "VREG_RTMR2_3P3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
|
||||
pinctrl-0 = <&rtmr2_3p3_reg_en>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vph_pwr: regulator-vph-pwr {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
@ -591,6 +759,207 @@ vreg_l3j_0p8: ldo3 {
|
||||
};
|
||||
};
|
||||
|
||||
&gpu {
|
||||
status = "okay";
|
||||
|
||||
zap-shader {
|
||||
firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qcdxkmsuc8380.mbn";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <400000>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
typec-mux@8 {
|
||||
compatible = "parade,ps8830";
|
||||
reg = <0x08>;
|
||||
|
||||
clocks = <&rpmhcc RPMH_RF_CLK5>;
|
||||
clock-names = "xo";
|
||||
|
||||
vdd-supply = <&vreg_rtmr2_1p15>;
|
||||
vdd33-supply = <&vreg_rtmr2_3p3>;
|
||||
vdd33-cap-supply = <&vreg_rtmr2_3p3>;
|
||||
vddar-supply = <&vreg_rtmr2_1p15>;
|
||||
vddat-supply = <&vreg_rtmr2_1p15>;
|
||||
vddio-supply = <&vreg_rtmr2_1p8>;
|
||||
|
||||
reset-gpios = <&tlmm 185 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
orientation-switch;
|
||||
retimer-switch;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
retimer_ss2_ss_out: endpoint {
|
||||
remote-endpoint = <&pmic_glink_ss2_ss_in>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
retimer_ss2_ss_in: endpoint {
|
||||
remote-endpoint = <&usb_1_ss2_qmpphy_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
retimer_ss2_con_sbu_out: endpoint {
|
||||
remote-endpoint = <&pmic_glink_ss2_con_sbu_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
typec-mux@8 {
|
||||
compatible = "parade,ps8830";
|
||||
reg = <0x08>;
|
||||
|
||||
clocks = <&rpmhcc RPMH_RF_CLK3>;
|
||||
clock-names = "xo";
|
||||
|
||||
vdd-supply = <&vreg_rtmr0_1p15>;
|
||||
vdd33-supply = <&vreg_rtmr0_3p3>;
|
||||
vdd33-cap-supply = <&vreg_rtmr0_3p3>;
|
||||
vddar-supply = <&vreg_rtmr0_1p15>;
|
||||
vddat-supply = <&vreg_rtmr0_1p15>;
|
||||
vddio-supply = <&vreg_rtmr0_1p8>;
|
||||
|
||||
reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
retimer-switch;
|
||||
orientation-switch;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
retimer_ss0_ss_out: endpoint {
|
||||
remote-endpoint = <&pmic_glink_ss0_ss_in>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
retimer_ss0_ss_in: endpoint {
|
||||
remote-endpoint = <&usb_1_ss0_qmpphy_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
retimer_ss0_con_sbu_out: endpoint {
|
||||
remote-endpoint = <&pmic_glink_ss0_con_sbu_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c7 {
|
||||
clock-frequency = <400000>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
typec-mux@8 {
|
||||
compatible = "parade,ps8830";
|
||||
reg = <0x8>;
|
||||
|
||||
clocks = <&rpmhcc RPMH_RF_CLK4>;
|
||||
clock-names = "xo";
|
||||
|
||||
vdd-supply = <&vreg_rtmr1_1p15>;
|
||||
vdd33-supply = <&vreg_rtmr1_3p3>;
|
||||
vdd33-cap-supply = <&vreg_rtmr1_3p3>;
|
||||
vddar-supply = <&vreg_rtmr1_1p15>;
|
||||
vddat-supply = <&vreg_rtmr1_1p15>;
|
||||
vddio-supply = <&vreg_rtmr1_1p8>;
|
||||
|
||||
reset-gpios = <&tlmm 176 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
retimer-switch;
|
||||
orientation-switch;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
retimer_ss1_ss_out: endpoint {
|
||||
remote-endpoint = <&pmic_glink_ss1_ss_in>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
retimer_ss1_ss_in: endpoint {
|
||||
remote-endpoint = <&usb_1_ss1_qmpphy_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
retimer_ss1_con_sbu_out: endpoint {
|
||||
remote-endpoint = <&pmic_glink_ss1_con_sbu_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdss {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdss_dp0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdss_dp0_out {
|
||||
data-lanes = <0 1>;
|
||||
};
|
||||
|
||||
&mdss_dp1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdss_dp1_out {
|
||||
data-lanes = <0 1>;
|
||||
};
|
||||
|
||||
&mdss_dp2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdss_dp2_out {
|
||||
data-lanes = <0 1>;
|
||||
};
|
||||
|
||||
&pcie4 {
|
||||
perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
|
||||
wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
|
||||
@ -646,6 +1015,27 @@ &pcie6a_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pm8550_gpios {
|
||||
usb0_3p3_reg_en: usb0-3p3-reg-en-state {
|
||||
pins = "gpio11";
|
||||
function = "normal";
|
||||
};
|
||||
};
|
||||
|
||||
&pmc8380_5_gpios {
|
||||
usb0_pwr_1p15_en: usb0-pwr-1p15-en-state {
|
||||
pins = "gpio8";
|
||||
function = "normal";
|
||||
};
|
||||
};
|
||||
|
||||
&pm8550ve_9_gpios {
|
||||
usb0_1p8_reg_en: usb0-1p8-reg-en-state {
|
||||
pins = "gpio8";
|
||||
function = "normal";
|
||||
};
|
||||
};
|
||||
|
||||
&qupv3_0 {
|
||||
status = "okay";
|
||||
};
|
||||
@ -792,6 +1182,48 @@ wake-n-pins {
|
||||
};
|
||||
};
|
||||
|
||||
rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state {
|
||||
pins = "gpio188";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state {
|
||||
pins = "gpio175";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state {
|
||||
pins = "gpio186";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
rtmr2_1p15_reg_en: rtmr2-1p15-reg-en-state {
|
||||
pins = "gpio189";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
rtmr2_1p8_reg_en: rtmr2-1p8-reg-en-state {
|
||||
pins = "gpio126";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
rtmr2_3p3_reg_en: rtmr2-3p3-reg-en-state {
|
||||
pins = "gpio187";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
wcd_default: wcd-reset-n-active-state {
|
||||
pins = "gpio191";
|
||||
function = "gpio";
|
||||
@ -843,7 +1275,7 @@ &usb_1_ss0_dwc3_hs {
|
||||
};
|
||||
|
||||
&usb_1_ss0_qmpphy_out {
|
||||
remote-endpoint = <&pmic_glink_ss0_ss_in>;
|
||||
remote-endpoint = <&retimer_ss0_ss_in>;
|
||||
};
|
||||
|
||||
&usb_1_ss1_hsphy {
|
||||
@ -875,7 +1307,7 @@ &usb_1_ss1_dwc3_hs {
|
||||
};
|
||||
|
||||
&usb_1_ss1_qmpphy_out {
|
||||
remote-endpoint = <&pmic_glink_ss1_ss_in>;
|
||||
remote-endpoint = <&retimer_ss1_ss_in>;
|
||||
};
|
||||
|
||||
&usb_1_ss2_hsphy {
|
||||
@ -907,5 +1339,5 @@ &usb_1_ss2_dwc3_hs {
|
||||
};
|
||||
|
||||
&usb_1_ss2_qmpphy_out {
|
||||
remote-endpoint = <&pmic_glink_ss2_ss_in>;
|
||||
remote-endpoint = <&retimer_ss2_ss_in>;
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user