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On RISC-V platforms, just like other platforms, we need to pass various information from one stage to another (hartid/cmo operations etc). Also there are some settings like Timer freq which are platform dependent which use PCDs. Today hartid is extracted through Firmware Context (custom in mem structure passed from one stage to another). For CMO we have a features HOB. Going forward we would like to have a standard mechanism to pass on such information and DT is handy as it can easily carry all this information (in some cases nodes already exists). This patch implement timebase frequency extraction from DT. Signed-off-by: Akshay Behl <cap2k4@rivosinc.com> Co-authored-by: Dhaval Sharma <dhaval@rivosinc.com>
240 lines
5.7 KiB
C
240 lines
5.7 KiB
C
/** @file
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RISC-V instance of Timer Library.
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Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Uefi.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Register/RiscV64/RiscVImpl.h>
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#include <Pi/PiBootMode.h>
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#include <Pi/PiHob.h>
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#include <Library/HobLib.h>
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#include <Library/FdtLib.h>
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STATIC UINT64 mTimeBase;
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/**
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Stalls the CPU for at least the given number of ticks.
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Stalls the CPU for at least the given number of ticks. It's invoked by
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MicroSecondDelay() and NanoSecondDelay().
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@param Delay A period of time to delay in ticks.
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**/
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STATIC
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VOID
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InternalRiscVTimerDelay (
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IN UINT64 Delay
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)
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{
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UINT64 Ticks;
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Ticks = RiscVReadTimer () + Delay;
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while (RiscVReadTimer () <= Ticks) {
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CpuPause ();
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}
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}
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/**
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Stalls the CPU for at least the given number of microseconds.
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Stalls the CPU for the number of microseconds specified by MicroSeconds.
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@param MicroSeconds The minimum number of microseconds to delay.
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@return MicroSeconds
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**/
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UINTN
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EFIAPI
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MicroSecondDelay (
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IN UINTN MicroSeconds
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)
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{
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InternalRiscVTimerDelay (
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DivU64x32 (
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MultU64x32 (
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MicroSeconds,
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mTimeBase
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),
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1000000u
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)
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);
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return MicroSeconds;
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}
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/**
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Stalls the CPU for at least the given number of nanoseconds.
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Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
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@param NanoSeconds The minimum number of nanoseconds to delay.
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@return NanoSeconds
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**/
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UINTN
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EFIAPI
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NanoSecondDelay (
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IN UINTN NanoSeconds
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)
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{
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InternalRiscVTimerDelay (
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DivU64x32 (
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MultU64x32 (
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NanoSeconds,
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mTimeBase
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),
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1000000000u
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)
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);
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return NanoSeconds;
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}
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/**
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Retrieves the current value of a 64-bit free running performance counter.
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Retrieves the current value of a 64-bit free running performance counter. The
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counter can either count up by 1 or count down by 1. If the physical
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performance counter counts by a larger increment, then the counter values
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must be translated. The properties of the counter can be retrieved from
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GetPerformanceCounterProperties().
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@return The current value of the free running performance counter.
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**/
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UINT64
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EFIAPI
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GetPerformanceCounter (
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VOID
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)
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{
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return (UINT64)RiscVReadTimer ();
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}
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/**return
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Retrieves the 64-bit frequency in Hz and the range of performance counter
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values.
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If StartValue is not NULL, then the value that the performance counter starts
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with immediately after is it rolls over is returned in StartValue. If
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EndValue is not NULL, then the value that the performance counter end with
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immediately before it rolls over is returned in EndValue. The 64-bit
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frequency of the performance counter in Hz is always returned. If StartValue
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is less than EndValue, then the performance counter counts up. If StartValue
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is greater than EndValue, then the performance counter counts down. For
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example, a 64-bit free running counter that counts up would have a StartValue
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of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
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that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
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@param StartValue The value the performance counter starts with when it
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rolls over.
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@param EndValue The value that the performance counter ends with before
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it rolls over.
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@return The frequency in Hz.
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**/
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UINT64
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EFIAPI
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GetPerformanceCounterProperties (
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OUT UINT64 *StartValue, OPTIONAL
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OUT UINT64 *EndValue OPTIONAL
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)
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{
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if (StartValue != NULL) {
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*StartValue = 0;
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}
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if (EndValue != NULL) {
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*EndValue = 32 - 1;
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}
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if (mTimeBase != 0) {
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return mTimeBase;
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}
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//
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// Locate the FDT HOB and validate header
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//
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CONST EFI_HOB_GUID_TYPE *Hob = GetFirstGuidHob (&gFdtHobGuid);
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ASSERT (Hob != NULL);
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CONST VOID *DeviceTreeBase =
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(CONST VOID *)(UINTN)*(CONST UINT64 *)GET_GUID_HOB_DATA (Hob);
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ASSERT (FdtCheckHeader (DeviceTreeBase) == 0);
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//
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// /cpus node
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//
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INT32 Node = FdtSubnodeOffsetNameLen (
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DeviceTreeBase,
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0,
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"cpus",
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sizeof ("cpus") - 1
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);
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ASSERT (Node >= 0);
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//
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// timebase-frequency property
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//
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INT32 Len;
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CONST FDT_PROPERTY *Prop =
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FdtGetProperty (DeviceTreeBase, Node, "timebase-frequency", &Len);
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ASSERT (Prop != NULL && Len == sizeof (UINT32));
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//
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// Device-tree cells are big-endian
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//
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mTimeBase = SwapBytes32 (*(CONST UINT32 *)Prop->Data);
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return mTimeBase;
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}
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/**
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Converts elapsed ticks of performance counter to time in nanoseconds.
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This function converts the elapsed ticks of running performance counter to
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time value in unit of nanoseconds.
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@param Ticks The number of elapsed ticks of running performance counter.
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@return The elapsed time in nanoseconds.
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**/
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UINT64
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EFIAPI
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GetTimeInNanoSecond (
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IN UINT64 Ticks
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)
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{
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UINT64 NanoSeconds;
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UINT32 Remainder;
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//
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// Ticks
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// Time = --------- x 1,000,000,000
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// Frequency
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//
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NanoSeconds = MultU64x32 (DivU64x32Remainder (Ticks, mTimeBase, &Remainder), 1000000000u);
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//
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// Frequency < 0x100000000, so Remainder < 0x100000000, then (Remainder * 1,000,000,000)
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// will not overflow 64-bit.
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//
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NanoSeconds += DivU64x32 (MultU64x32 ((UINT64)Remainder, 1000000000u), mTimeBase);
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return NanoSeconds;
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}
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